HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 438
HD6412340
Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6412340.pdf
(907 pages)
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Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits are used to select the SCI clock
source and enable or disable clock output from the SCK pin. The combination of the CKE1 and
CKE0 bits determines whether the SCK pin functions as an I/O port, the serial clock output pin, or
the serial clock input pin.
The setting of the CKE0 bit, however, is only valid for internal clock operation (CKE1 = 0) in
asynchronous mode. The CKE0 bit setting is invalid in clocked synchronous mode, and in the case
of external clock operation (CKE1 = 1). Note that the SCI’s operating mode must be decided using
SMR before setting the CKE1 and CKE0 bits.
For details of clock source selection, see table 12.9 in section 12.3, Operation.
Bit 1
CKE1
0
1
Notes: 1. Initial value
424
2. Outputs a clock of the same frequency as the bit rate.
3. Inputs a clock with a frequency 16 times the bit rate.
Bit 0
CKE0
0
1
0
1
Description
Asynchronous mode
Clocked synchronous
mode
Asynchronous mode
Clocked synchronous
mode
Asynchronous mode
Clocked synchronous
mode
Asynchronous mode
Clocked synchronous
mode
Internal clock/SCK pin functions as I/O port*
Internal clock/SCK pin functions as serial clock
output
Internal clock/SCK pin functions as clock output*
Internal clock/SCK pin functions as serial clock
output
External clock/SCK pin functions as clock input*
External clock/SCK pin functions as serial clock
input
External clock/SCK pin functions as clock input*
External clock/SCK pin functions as serial clock
input
1
3
3
2
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