HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 505
HD6412340
Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6412340.pdf
(907 pages)
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Serial Data Transmission: As data transmission in smart card mode involves error signal
sampling and retransmission processing, the processing procedure is different from that for the
normal SCI. Figure 13.4 shows an example of the transmission processing flow.
Also, figure 13.5 shows the relationship between transmission operations and the internal
registers.
[1] Perform Smart Card interface mode initialization as described above in Initialization.
[2] Check that the ERS error flag in SSR is cleared to 0.
[3] Repeat steps [2] and [3] until it can be confirmed that the TEND flag in SSR is set to 1.
[4] Write the transmit data to TDR, clear the TDRE flag to 0, and perform the transmit operation.
[5] When transmitting data continuously, go back to step [2].
[6] To end transmission, clear the TE bit to 0.
If transmission ends and the TEND flag is set to 1 while the TIE bit is set to 1 and interrupt
requests are enabled, a transmit data empty interrupt (TXI) request will be generated. If an error
occurs in transmission and the ERS flag is set to 1 while the RIE bit is set to 1 and interrupt
requests are enabled, a transfer error interrupt (ERI) request will be generated.
The timing for setting the TEND flag depends on the value of the GM bit in SMR. The TEND
timing is shown in figure 13.6.
If the DTC is activated by a TXI request, the number of bytes set in the DTC can be transmitted
automatically, including automatic retransmission.
For details, see Interrupt Operations and Data Transfer Operation by DTC below.
The TEND flag is cleared to 0.
With the above processing, interrupt servicing or data transfer by the DTC is possible.
491
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