HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 593
HD6412340
Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6412340.pdf
(907 pages)
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17.10
There are three kinds of flash memory program/erase protection: hardware protection, software
protection, and error protection.
17.10.1 Hardware Protection
Hardware protection refers to a state in which programming/erasing of flash memory is forcibly
disabled or aborted. Hardware protection is reset by settings in flash memory control registers 1
and 2 (FLMCR1, FLMCR2) and erase block registers 1 and 2 (EBR1, EBR2). (See table 17.16.)
Table 17.16 Hardware Protection
Item
FWE pin
protection
Reset/standby
protection
Note: * Program verify and erase verify modes.
17.10.2 Software Protection
Software protection can be implemented by setting the SWE bit in FLMCR1, erase block registers
1 and 2 (EBR1, EBR2), and the RAMS bit in RAMER. When software protection is in effect,
setting the P or E bit in flash memory control register 1 (FLMCR1) does not cause a transition to
program mode or erase mode. (See table 17.17.)
Flash Memory Protection
Description
When a low level is input to the FWE pin,
FLMCR1, FLMCR2 (excluding the FLER
bit), EBR1, and EBR2 are initialized, and
the program/erase-protected state is
entered.
In a reset (including a WDT overflow reset)
and in standby mode, FLMCR1, FLMCR2,
EBR1, and EBR2 are initialized, and the
program/erase-protected state is entered.
In a reset via the RES pin, the reset state
is not entered unless the RES pin is held
low until oscillation stabilizes after
powering on. In the case of a reset during
operation, hold the RES pin low for the
RES pulse width (t
Characteristics section.
RESW
) specified in the AC
Program Erase
No
No
Functions
No
No
Verify*
No
No
581
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