HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 598
HD6412340
Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6412340.pdf
(907 pages)
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17.11.2 RAM Overlap
An example in which flash memory block area EB1 is overlapped is shown below.
Example in Which Flash Memory Block Area (EB1) is Overlapped
1. Set bits RAMS, RAM1, and RAM0 in RAMER to 1, 0, 1, to overlap part of RAM onto the
2. Real-time programming is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.
4. The data written in the overlapping RAM is written into the flash memory space (EB1).
Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks
586
area (EB1) for which real-time programming is required.
2. A RAM area cannot be erased by execution of software in accordance with the erase
3. Block area EB0 includes the vector table. When performing RAM emulation, the
regardless of the value of RAM1 and RAM0 (emulation protection). In this state,
setting the P or E bit in flash memory control register 1 (FLMCR1) will not cause a
transition to program mode or erase mode. When actually programming a flash
memory area, the RAMS bit should be cleared to 0.
algorithm while flash memory emulation in RAM is being used.
vector table is needed by the overlap RAM.
H'000000
H'000400
H'000800
H'000C00
Figure 17.25 Example of RAM Overlap Operation
Flash memory
EB4 to EB9
EB0
EB1
EB2
EB3
This area can be accessed
from both the RAM area
and flash memory area
On-chip RAM
H'FFEC00
H'FFEFFF
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