HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 609
HD6412340
Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6412340.pdf
(907 pages)
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Notes on Use of Auto-Program Mode
Address
In auto-program mode, 128 bytes are programmed simultaneously. This should be carried out
by executing 128 consecutive byte transfers.
A 128-byte data transfer is necessary even when programming fewer than 128 bytes. In this
case, H'FF data must be written to the extra addresses.
The lower 8 bits of the transfer address must be H'00 or H'80. If a value other than an effective
address is input, processing will switch to a memory write operation but a write error will be
flagged.
Memory address transfer is performed in the second cycle (figure 17.31). Do not perform
memory address transfer after the second cycle.
Do not perform a command write during a programming operation.
Perform one auto-programming operation for a 128-byte block for each address.
Characteristics are not guaranteed for two or more programming operations.
Confirm normal end of auto-programming by checking FO
can also be used for this purpose (FO
identification pin).
The status polling FO
the next command write is performed, reading is possible by enabling CE and OE.
FWE
Data
FO
FO
WE
OE
CE
7
6
t
pns
t
ces
t
f
t
wep
t
H'40
ds
Figure 17.31 Auto-Program Mode Timing Waveforms
t
t
ceh
dh
t
r
6
and FO
t
nxtc
7
t
pin information is retained until the next command write. Until
as
Address
stable
7
Data
status polling uses the auto-program operation end
t
ah
1 byte to 128 bytes
Data transfer
6
Data
. Alternatively, status read mode
t
Programming wait
write
Programming operation
end identification signal
Programming normal
end identification signal
t
wsts
(1 to 3000 ms)
t
spa
FO
0
to FO
t
pnh
5
= 0
t
nxtc
597
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