HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 676
HD6412340
Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6412340.pdf
(907 pages)
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20.3.3
The bus timing is shown below.
Basic Bus Timing (Two-State Access): Figure 20.11 shows the basic bus timing for external two-
state access.
Basic Bus Timing (Three-State Access): Figure 20.12 shows the basic bus timing for external
three-state access.
Basic Bus Timing (Three-State Access with One Wait State): Figure 20.13 shows the basic bus
timing for external three-state access with one wait state.
Burst ROM Access Timing (Two-State Access): Figure 20.14 shows the burst ROM access
timing for two-state access.
Burst ROM Access Timing (One-State Access): Figure 20.15 shows the burst ROM access
timing for one-state access.
External Bus Release Timing: Figure 20.16 shows the external bus release timing.
Bus Timing
ø
NMI
IRQi
(i= 0 to 2)
IRQ
Edge input
IRQ
Level input
Figure 20.10 Interrupt Input Timing
t
t
t
NMIS
IRQS
IRQS
t
t
NMIW
IRQW
t
t
NMIH
IRQH
667
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