HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 723
HD6412340
Manufacturer Part Number
HD6412340
Description
H8S/2345 F-ZTAT Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6412340.pdf
(907 pages)
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Table A.2 Instruction Codes (cont)
Note:
Legend
IMM:
abs:
disp:
rs, rd, rn:
ers, erd, ern, erm:
The register fields specify general registers as follows.
Register
Field
XORC
Instruc-
000
001
111
tion
•
•
•
Address Register
32-Bit Register
*
Bit 7 of the 4th byte of the MOV.L ERs, @(d:32,ERd) instruction can be either 1 or 0.
XORC #xx:8,CCR
XORC #xx:8,EXR
Mnemonic
General
Register
ER0
ER1
ER7
•
•
•
Immediate data (2, 3, 8, 16, or 32 bits)
Absolute address (8, 16, 24, or 32 bits)
Displacement (8, 16, or 32 bits)
Register field (4 bits specifying an 8-bit or 16-bit register. The symbols rs, rd, and rn correspond to operand symbols Rs, Rd,and Rn.)
Register field (3 bits specifying an address register or 32-bit register. The symbols ers, erd, ern, and erm correspond to operand
symbols ERs, ERd, ERn, and ERm.)
Size
B
B
Register
Field
0000
0001
0111
1000
1001
1111
•
•
•
•
•
•
1st byte
0
0
16-Bit Register
5
1
2nd byte
4
General
Register
IMM
R0
R1
R7
E0
E1
E7
•
•
•
•
•
•
1
3rd byte
0
5
Register
Field
0000
0001
0111
1000
1001
1111
4th byte
•
•
•
•
•
•
IMM
8-Bit Register
5th byte
Instruction Format
General
Register
R0H
R1H
R7H
R0L
R1L
R7L
•
•
•
•
•
•
6th byte
7th byte
8th byte
9th byte
10th byte
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