HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 123

• Manufacturer Part Number: HD6412373R
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Instruction Size *
DIVXS
CMP
NEG
EXTU
EXTS
TAS *
Notes: 1. Size refers to the operand size.
2
2. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
B: Byte
W: Word
L:
B/W
B/W/L
B/W/L
W/L
W/L
B
Longword
1
Function
Rd ÷ Rs → Rd
Performs signed division on data in two general registers: either 16 bits ÷
8 bits → 8-bit quotient and 8-bit remainder or 32 bits ÷ 16 bits → 16-bit
quotient and 16-bit remainder.
Rd – Rs, Rd – #IMM
Compares data in a general register with data in another general register
or with immediate data, and sets the CCR bits according to the result.
0 – Rd → Rd
Takes the two’s complement (arithmetic complement) of data in a
general register.
Rd (zero extension) → Rd
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by padding with zeros on the
left.
Rd (sign extension) → Rd
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by extending the sign bit.
@ERd – 0, 1 → (<bit 7> of @ERd)
Tests memory contents, and sets the most significant bit (bit 7) to 1.
Rev.7.00 Mar. 18, 2009 page 55 of 1136
REJ09B0109-0700
Section 2 CPU