HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 725
HD6412373R
Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
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13.3.4
TCR selects the clock source and the time at which TCNT is cleared, and controls interrupts.
Bit
7
6
5
4
3
2
1
0
CMIEB
CMIEA
OVIE
CCLR1
CCLR0
CKS2
CKS1
CKS0
Bit Name
Timer Control Register (TCR)
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Compare Match Interrupt Enable B
Selects whether CMFB interrupt requests
(CMIB) are enabled or disabled when the CMFB
flag in TCSR is set to 1.
0: CMFB interrupt requests (CMIB) are disabled
1: CMFB interrupt requests (CMIB) are enabled
Compare Match Interrupt Enable A
Selects whether CMFA interrupt requests
(CMIA) are enabled or disabled when the CMFA
flag in TCSR is set to 1.
0: CMFA interrupt requests (CMIA) are disabled
1: CMFA interrupt requests (CMIA) are enabled
Timer Overflow Interrupt Enable
Selects whether OVF interrupt requests (OVI)
are enabled or disabled when the OVF flag in
TCSR is set to 1.
0: OVF interrupt requests (OVI) are disabled
1: OVF interrupt requests (OVI) are enabled
Counter Clear 1 and 0
These bits select the method by which TCNT is
cleared.
00: Clearing is disabled
01: Clear by compare match A
10: Clear by compare match B
11: Clear by rising edge of external reset input
Clock Select 2 to 0
These bits select the clock input to TCNT and
count condition. See table 13.2.
Rev.7.00 Mar. 18, 2009 page 657 of 1136
Section 13 8-Bit Timers (TMR)
REJ09B0109-0700
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