HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 763
HD6412373R
Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
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already been written to TDR during serial transmission, the SCI transfers the written data to TSR
to continue transmission. Although TDR can be read or written to by the CPU at all times, to
achieve reliable serial transmission, write transmit data to TDR for only once after confirming that
the TDRE bit in SSR is set to 1.
15.3.4
TSR is a shift register that transmits serial data. To perform serial data transmission, the SCI first
transfers transmit data from TDR to TSR, then sends the data to the TxD pin starting. TSR cannot
be directly accessed by the CPU.
15.3.5
SMR is used to set the SCI’s serial transfer format and select the on-chip baud rate generator clock
source.
Some bit functions of SMR differ in normal serial communication interface mode and Smart Card
interface mode.
Normal Serial Communication Interface Mode (When SMIF in SCMR is 0)
Bit
7
6
Bit Name
C/A
CHR
Transmit Shift Register (TSR)
Serial Mode Register (SMR)
Initial Value
0
0
R/W
R/W
R/W
Section 15 Serial Communication Interface (SCI, IrDA)
Description
Communication Mode
0: Asynchronous mode
1: Clocked synchronous mode
Character Length (enabled only in asynchronous
mode)
0: Selects 8 bits as the data length.
1: Selects 7 bits as the data length. LSB-first is
In clocked synchronous mode, a fixed data length
of 8 bits is used.
fixed and the MSB (bit 7) of TDR is not
transmitted in transmission.
Rev.7.00 Mar. 18, 2009 page 695 of 1136
REJ09B0109-0700
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