HD6417618 RENESAS [Renesas Technology Corp], HD6417618 Datasheet - Page 280

• Manufacturer Part Number: HD6417618
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7618 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 11 Ethernet Controller (EtherC)
1. When the transmit enable (TE) bit is set, the transmitter enters the transmit idle state.
2. When a transmit request is issued by the transmit E-DMAC, the EtherC sends the preamble
Rev. 6.00 Jun. 12, 2007 Page 248 of 610
REJ09B0131-0600
after a transmission delay equivalent to the frame interval time. If full-duplex transfer is
selected, which does not require carrier detection, the preamble is sent as soon as a transmit
request is issued by the E-DMAC.
Transmission
[Legend]
FDPX: Full Duplex
HDPX: Half Duplex
SFD: Start Frame Delimiter
Notes: 1. Transmission retry processing includes both jam transmission that depends on collision
Reset
halted
TE set
2. Transmission is retried only when data of 512 bits or less (including the preamble and
detection and the adjustment of transmission intervals based on the back-off algorithm.
SFD) is transmitted. When a collision is detected during the transmission of data greater
than 512 bits, only jam is transmitted and transmission based on the back-off algorithm
is not retried.
TE reset
Figure 11.2 EtherC Transmitter State Transitions
Idle
notification
retransfer attempts
after 512-bit time
Error
Failure of 15
HDPX
or collision
Normal transmission
Error detection
processing*
Retransfer
detection
detection
Carrier
FDPX
Carrier
non-detection
1
Carrier
Retransfer
initiation
Error
non-detection
Carrier
(preamble transmission)
Error
Collision
Start of transmission
Collision
Error
Collision*
Collision*
transmission
transmission
transmission
detection
Carrier
Data
CRC
SFD
2
2
HDPX
FDPX