HD6433045 HITACHI [Hitachi Semiconductor], HD6433045 Datasheet - Page 166

• Manufacturer Part Number: HD6433045
• Description: Hitachi Single-Chip Microcomputer
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bit 4—Strobe Mode Select
valid when PSRAME = 0 and DRAME = 1. This bit is write-disabled when the PSRAME or
DRAME bit is set to 1.
Bit 4
CAS/WE
0
1
Bit 3—Address Multiplex Mode Select (M9/M8): Selects 8-bit or 9-bit column addressing.
The setting of this bit is valid when PSRAME = 0 and DRAME = 1. This bit is write-disabled
when the PSRAME or DRAME bit is set to 1.
Bit 3
M9/M8
0
1
Bit 2—Refresh Pin Enable (RFSHE): Enables or disables refresh signal output from the
RFSH pin. This bit is write-disabled when the PSRAME or DRAME bit is set to 1.
Bit 2
RFSHE
0
1
Bit 1—Reserved: Read-only bit, always read as 1.
Bit 0—Refresh Cycle Enable (RCYCE): Enables or disables insertion of refresh cycles.
The setting of this bit is valid when PSRAME = 1 or DRAME = 1. When PSRAME = 0 and
DRAME = 0, refresh cycles are not inserted regardless of the setting of this bit.
Bit 0
RCYCE Description
0
1
Description
8-bit column address mode
9-bit column address mode
Description
Refresh signal output at the RFSH pin is disabled
(the RFSH pin can be used as a generic input/output port)
Refresh signal output at the RFSH pin is enabled
Refresh cycles are disabled
Refresh cycles are enabled for area 3
Description
2WE mode
2CAS mode
(CAS/WE): Selects 2CAS or 2WE mode. The setting of this bit is
152
(Initial value)
(Initial value)
(Initial value)
(Initial value)