HD6433045 HITACHI [Hitachi Semiconductor], HD6433045 Datasheet - Page 201

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HD6433045

Manufacturer Part Number
HD6433045
Description
Hitachi Single-Chip Microcomputer
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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8.1.3 Functional Overview
Table 8-1 gives an overview of the DMAC functions.
Table 8-1 DMAC Functional Overview
Transfer Mode
Short
address
mode
Full
address
mode
I/O mode
• Transfers one byte or one word
• Increments or decrements the
• Executes 1 to 65,536 transfers
Idle mode
• Transfers one byte or one word
• Holds the memory address fixed
• Executes 1 to 65,536 transfers
Repeat mode
• Transfers one byte or one word
• Increments or decrements the
• Executes a specified number (1 to
Normal mode
• Auto-request
• External request
Block transfer
• Transfers one block of a specified
• Executes 1 to 65,536 transfers
• Allows either the source or
• Block size can be 1 to 255 bytes
per request
memory address by 1 or 2
per request
per request
memory address by 1 or 2
255) of transfers, then returns to
the initial state and continues
— Retains the transfer request
— Executes a specified number
— Selection of burst mode or
— Transfers one byte or one word
— Executes 1 to 65,536 transfers
size per request
destination to be a fixed block
area
or words
internally
(1 to 65,536) of transfers
continuously
cycle-steal mode
per request
187
Activation
• Compare match/input 24
• Transmit-data-empty
• Receive-data-full
• External request
• Auto-request
• External request
• Compare match/
• External request
capture A interrupts
from ITU channels
0 to 3
interrupt from SCI
channel 0
interrupt from SCI
channel 0
input capture A
interrupts from ITU
channels 0 to 3
24
24
Source tion
8
24
Reg. Length
Address
24
24
Destina-
8
24
8

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