HD6433045 HITACHI [Hitachi Semiconductor], HD6433045 Datasheet - Page 273

• Manufacturer Part Number: HD6433045
• Description: Hitachi Single-Chip Microcomputer
• Manufacturer: HITACHI [Hitachi Semiconductor]

Port 5 Data Direction Register (P5DDR): P5DDR is an 8-bit write-only register that can select
input or output for each pin in port 5.
Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled): P5DDR values are fixed at 1
and cannot be modified. Port 5 functions as an address bus. The reserved bits (bits 7 to 4) are also
fixed at 1.
Modes 5 and 6 (Expanded Modes with On-Chip ROM Enabled): Following a reset, port 5 is an
input port. A pin in port 5 becomes an address output pin if the corresponding P5DDR bit is set to
1, and an input port if this bit is cleared to 0.
Mode 7 (Single-Chip Mode): Port 5 functions as an input/output port. A pin in port 5 becomes an
output port if the corresponding P5DDR bit is set to 1, and an input port if this bit is cleared to 0.
P5DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P5DDR is initialized to H'F0 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting, so if a P5DDR bit is set to 1, the corresponding pin maintains its
output state in software standby mode.
Port 5 Data Register (P5DR): P5DR is an 8-bit readable/writable register that stores output data for
pins P5
bit is returned. When a bit in P5DDR is cleared to 0, if port 5 is read the corresponding pin level is read.
Bit
Initial value
Read/Write
Bit
Modes
1 to 4
Modes
5 to 7
3
to P5
Initial value
Read/Write
Initial value
Read/Write
0
. When a bit in P5DDR is set to 1, if port 5 is read the value of the corresponding P5DR
—
—
7
1
—
—
—
7
1
1
Reserved bits
Reserved bits
—
—
6
1
—
—
—
6
1
1
—
—
5
1
—
—
—
5
1
1
260
—
—
4
1
—
—
—
4
1
1
R/W
P5
P5 DDR
3
0
3
3
—
W
3
1
0
Port 5 data direction 3 to 0
These bits select input or
output for port 5 pins
Port 5 data 3 to 0
These bits store data
for port 5 pins
R/W
P5
P5 DDR
2
0
2
2
—
W
2
1
0
P5 DDR
R/W
P5
1
0
1
—
W
1
1
1
0
P5 DDR
R/W
P5
0
0
0
—
W
0
1
0
0