HD6433045 HITACHI [Hitachi Semiconductor], HD6433045 Datasheet - Page 609

• Manufacturer Part Number: HD6433045
• Description: Hitachi Single-Chip Microcomputer
• Manufacturer: HITACHI [Hitachi Semiconductor]

Flowchart for Erasing Multiple Blocks
Erase-verify
next block
Address + 1
address
No
Select erase mode (E bit = 1 in FLMCR)
Wait initial value setting x = 6.25 ms
Clear EBR bit of erase-verified block
(set bits of blocks to be erased to 1)
Write 0 data to all addresses to be
Figure 18-18 Multiple-Block Erase Flowchart
No
Dummy write to verify address
(flash memory latches address)
Set top address of block as
Set erase block registers
Enable watchdog timer
Select erase-verify mode
(V
Disable watchdog timer
(EV bit = 1 in FLMCR)
(EBR1 = EBR2 = 0?)
PP
erased (prewrite)
All blocks erased?
Yes
address in block?
All erased blocks
Yes
E bit = 1 in FLMCR)
Clear
verify address
(read memory)
Wait (t
Wait (t
OK
Clear EV bit
End of erase
Set V
Yes
Wait (x) ms
Wait (z) s
Clear E bit
verified?
Verify
Start
n = 1
Last
V
PP
VS1
VS2
PP
E bit
E
) s
) s
bit
*1
*2
*
3
No good
No
*4
600
Erasing ends
(clear bits of blocks to be erased to 0)
Double the erase time (x
All erased blocks
Notes: 1. Program all addresses to be erased by
Clear erase block registers
verified?
Yes
Clear
Yes
Erase error
2. Set the watchdog timer overflow interval to
3. For the erase-verify dummy write, write H'FF
4. When erasing two or more blocks, clear the
5. t
6. The erase time x is successively
n
n
following the prewrite flowchart.
the value indicated in table 18-15.
with a byte transfer instruction.
bits of erased blocks in the erase block
register, so that only unerased blocks will be
erased again.
z:
t
N:
incremented by the initial set value
value of 10 ms or less should be
set, and the time for one erasure
should be 50 ms or less.
N?
VS1
VS2
V
4?
No
PP
2
n–1
: 4 µs
: 2 µs
E
5 to 10 µs
602
Erase-verify next block
bit
(n = 1, 2, 3, 4). An initial
No
2
x)
No
Yes
n + 1
n