HD6433045 HITACHI [Hitachi Semiconductor], HD6433045 Datasheet - Page 762

• Manufacturer Part Number: HD6433045
• Description: Hitachi Single-Chip Microcomputer
• Manufacturer: HITACHI [Hitachi Semiconductor]

DTCR0B—Data Transfer Control Register 0B
•
Data transfer master enable
Bit
Initial value
Read/Write
0 Data transfer is disabled
1 Data transfer is enabled
Full address mode
Destination address increment/decrement (bit 5)
Destination address increment/decrement enable (bit 4)
DAID
Bit 5
0
1
Transfer mode select
0 Destination is the block area in block transfer mode
1 Source is the block area in block transfer mode
Data transfer select 2B to 0B
DTS2B
DAIDE
cont
Bit 4
Bit 2
0
1
0
1
0
1
DTME
R/W
DTS1B
Increment/Decrement Enable
MARB is held fixed
Incremented:
MARB is held fixed
Decremented:
Bit 1
7
0
0
1
0
1
DTS0B
Bit 0
R/W
0
1
0
1
0
1
0
1
—
6
0
If DTSZ = 0, MARB is incremented by 1 after each transfer
If DTSZ = 1, MARB is incremented by 2 after each transfer
If DTSZ = 0, MARB is decremented by 1 after each transfer
If DTSZ = 1, MARB is decremented by 2 after each transfer
Normal Mode
Auto-request
(burst mode)
Not available
Auto-request
(cycle-steal mode)
Not available
Not available
Not available
Falling edge of
Low level input at
DAID
R/W
5
0
Data Transfer Activation Source
DAIDE
755
R/W
DREQ
4
0
DREQ
TMS
R/W
3
0
Block Transfer Mode
Compare match/input capture
A from ITU channel 0
Compare match/input capture
A from ITU channel 1
Compare match/input capture
A from ITU channel 2
Compare match/input capture
A from ITU channel 3
Not available
Not available
Falling edge of
Not available
DTS2B
R/W
H'2F
2
0
DTS1B
DREQ
R/W
1
0
DTS0B
R/W
0
0
DMAC0