HD6433045 HITACHI [Hitachi Semiconductor], HD6433045 Datasheet - Page 9

• Manufacturer Part Number: HD6433045
• Description: Hitachi Single-Chip Microcomputer
• Manufacturer: HITACHI [Hitachi Semiconductor]

10.3
10.4
10.5
10.6
Section 11
11.1
11.2
10.2.9
10.2.10 Timer Control Registers (TCR) ...................................................................... 322
10.2.11 Timer I/O Control Register (TIOR)................................................................ 324
10.2.12 Timer Status Register (TSR)........................................................................... 326
10.2.13 Timer Interrupt Enable Register (TIER)......................................................... 329
CPU Interface ................................................................................................................. 331
10.3.1
10.3.2
Operation ........................................................................................................................ 335
10.4.1
10.4.2
10.4.3
10.4.4
10.4.5
10.4.6
10.4.7
10.4.8
10.4.9
Interrupts......................................................................................................................... 376
10.5.1
10.5.2
10.5.3
Usage Notes .................................................................................................................... 380
Overview......................................................................................................................... 395
11.1.1
11.1.2
11.1.3
11.1.4
Register Descriptions...................................................................................................... 399
11.2.1
11.2.2
11.2.3
11.2.4
11.2.5
11.2.6
11.2.7
11.2.8
11.2.9
11.2.10 TPC Output Mode Register (TPMR).............................................................. 410
Buffer Registers (BRA, BRB) ........................................................................ 321
16-Bit Accessible Registers ............................................................................ 331
8-Bit Accessible Registers .............................................................................. 333
Overview......................................................................................................... 335
Basic Functions............................................................................................... 336
Synchronization .............................................................................................. 346
PWM Mode .................................................................................................... 348
Reset-Synchronized PWM Mode ................................................................... 352
Complementary PWM Mode.......................................................................... 355
Phase Counting Mode..................................................................................... 365
Buffering......................................................................................................... 367
ITU Output Timing......................................................................................... 374
Setting of Status Flags .................................................................................... 376
Clearing of Status Flags.................................................................................. 378
Interrupt Sources and DMA Controller Activation ........................................ 379
Programmable Timing Pattern Controller
Features........................................................................................................... 395
Block Diagram................................................................................................ 396
TPC Pins ......................................................................................................... 397
Registers ......................................................................................................... 398
Port A Data Direction Register (PADDR) ...................................................... 399
Port A Data Register (PADR) ......................................................................... 399
Port B Data Direction Register (PBDDR) ...................................................... 400
Port B Data Register (PBDR) ......................................................................... 400
Next Data Register A (NDRA)....................................................................... 401
Next Data Register B (NDRB) ....................................................................... 403
Next Data Enable Register A (NDERA) ........................................................ 405
Next Data Enable Register B (NDERB)......................................................... 406
TPC Output Control Register (TPCR)............................................................ 407
......................................... 395