HD6433308 HITACHI [Hitachi Semiconductor], HD6433308 Datasheet - Page 225

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HD6433308

Manufacturer Part Number
HD6433308
Description
Hitachi Single-Chip MicroComputer
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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10.2.3 A/D Control Register (ADCR) – H’FFEA
Bit
Initial value
Read/Write
The A/D control register (ADCR) is an 8-bit readable/writable register that enables or disables the
A/D external trigger signal.
The ADCR is initialized to H’7F at a reset and in the standby modes.
Bit 7 – Trigger Enable (TRGE): This bit enables the ADTRG (A/D external trigger) signal to set
the ADST bit and start A/D conversion.
Bit 7
TRGE
Bits 6 to 0 – Reserved: These bits cannot be modified and are always read as “1.”
10.3 Operation
The A/D converter performs 8 successive approximations to obtain a result ranging from H’00
(corresponding to AV
A/D converter.
0
1
Description
A/D external trigger is disabled. ADTRG does not set
the ADST bit.
A/D external trigger is enabled. ADTRG sets the ADST bit.
(The ADST bit can also be set by software.)
TRGE
R/W
7
0
SS
) to H’FF (corresponding to AV
6
1
5
1
213
4
1
CC
). Figure 10-2 shows the response of the
3
1
2
1
1
1
(Initial value)
0
1

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