HD6433308 HITACHI [Hitachi Semiconductor], HD6433308 Datasheet - Page 242

• Manufacturer Part Number: HD6433308
• Description: Hitachi Single-Chip MicroComputer
• Manufacturer: HITACHI [Hitachi Semiconductor]

The value in PCDR0 after a reset is undetermined. In non-slave modes, the value obtained by
reading PCDR0 is unpredictable.
11.2.3 Parallel Communication Data Registers 1 to 14 – H’FFF2 (PCDR1) to H’FFFF
Bit
Initial value
R/W H8/300 CPU
Parallel communication data registers 1 to 14 are 8-bit registers which can be written and read by
either the H8/300 CPU or the master CPU. The H8/300 CPU can read and write these registers
regardless of the operating mode of the H8/330 chip. The master CPU can read and write them
only when the H8/330 chip is operating in slave mode.
In non-slave modes, these registers can be used as 14 bytes of data memory. Note that access
requires three states per byte, which is slower than the on-chip RAM.
The values in PCDR1 to PCDR14 after a reset are undetermined.
11.2.4 Parallel Communication Control/Status Register (PCCSR) – H’FFF0
Bit
Initial value
R/W H8/300 CPU
The PCCSR is an 8-bit readable and partly writable register that provides protocol and interrupt
control functions. Either CPU can read and write bit 4, which enables the RDY signal. The
H8/300 CPU can read and write bits 6, 4 and 2, which enable interrupts. The other bits are read-
only bits.
The PCCSR is initialized to H’00 at a reset and in the standby modes.
Master CPU
Master CPU
(PCDR1-14)
MWEF
R/W
R/W
—
R
R
7
7
0
EMWI
R/W
R/W
R/W
—
R
6
6
0
SWEF EAKAR MREF
R/W
R/W
—
R
R
5
5
0
231
R/W
R/W
R/W
R/W
—
4
4
0
R/W
R/W
—
R
R
3
3
0
EMRI
R/W
R/W
R/W
—
R
2
2
0
MWMF SWMF
R/W
R/W
—
R
R
1
1
0
R/W
R/W
—
R
R
0
0
0