HD6433308 HITACHI [Hitachi Semiconductor], HD6433308 Datasheet - Page 35

• Manufacturer Part Number: HD6433308
• Description: Hitachi Single-Chip MicroComputer
• Manufacturer: HITACHI [Hitachi Semiconductor]

2.2 Mode Descriptions
Mode 1 (Expanded Mode without On-Chip ROM): Mode 1 supports a 64K-byte address space
most of which is off-chip. In particular, the interrupt vector table is located in off-chip memory.
The on-chip ROM and dual-port RAM are not used. Software can select whether to use the on-chip
RAM. Ports 1 to 3, 8, and 9 are used for the address and data bus lines and control signals as
follows:
Ports 1 and 2:
Port 3:
Port 8 (pin 1), port 9 (pins 7, 5, 4, 3):
Mode 2 (Expanded Mode with On-Chip ROM): Mode 2 supports a 64K-byte address space of
which the first 16K bytes are in on-chip ROM. Software can select whether or not to use the on-
chip RAM, and can select the usage of pins in ports 1 and 2.
Ports 1 and 2:
Port 3:
Port 8 (pin 1), port 9 (pins 7, 5, 4, 3):
Note: In mode 2, ports 1 and 2 are initially general-purpose input ports. Software must change the
Mode 3 (Single-Chip Mode): In this mode all memory is on-chip, in 16K bytes of ROM, 512
bytes of RAM, and internal I/O registers. If enabled by software, the dual-port RAM can be
accessed by an external CPU.
Since no off-chip memory is accessed, there is no address bus; ports 1 and 2 are available for
general-purpose input and output. When the dual-port RAM is enabled, ports 3, 8, and 9 are used
as follows:
Port 3:
Port 8 (pins 0 to 3):
Port 9 (pins 7, 5, 4, 3):
The mode in which the dual-port RAM is enabled is also called the slave mode.
desired pins to output before using them for the address bus. See section 5, “I/O Ports” for
details.
Address bus
Data bus
Bus control signals
Address bus (see note)
Data bus
Bus control signals
Dual-port RAM data bus
Dual-port RAM register select
Dual-port RAM interface signals
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