HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 148

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HD6475328-CP10

Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
7.3 Operation in Each Wait Mode
Table 7-2 summarizes the operation of the three wait modes.
Table 7-2 Wait Modes
Mode
Programmable
wait mode
WMS1 = “0”
WMS0 = “0”
Pin wait mode
WMS1 = “1”
WMS0 = “0”
Pin auto-wait
mode
WMS1 = “1”
WMS0 = “1”
7.3.1 Programmable Wait Mode
The programmable wait mode is selected when WMS1 = “0” and WMS0 = “0.”
Whenever the CPU or DTC accesses an off-chip address, the number of wait states set in bits
WC1 and WC0 are inserted. The WAIT pin is not used for wait control; it is available as an I/O
pin.
WAIT
Pin Function Conditions
Disabled
Enabled
Enabled
Insertion
Inserted on access to 1 to 3 wait states are inserted, as
an off-chip address
Inserted on access to 0 to 3 wait states are inserted, as
an off-chip address
Inserted on access to 1 to 3 wait states are inserted, as
an off-chip address if
the WAIT pin is Low
130
Number of Wait
States Inserted
specified by bits WC0 and WC1.
specified by bits WC0 and WC1,
plus additional wait states while the
WAIT pin is held Low.
specified by bits WC0 and WC1.

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