HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 179

• Manufacturer Part Number: HD6475328-CP10
• Description: original Hitachi CMOS microcomputer unit (MCU)
• Manufacturer: HITACHI [Hitachi Semiconductor]

A: Before Execution of BSET Instruction
B: Execution of BSET Instruction
C: After Execution of BSET Instruction
Explanation: To execute the BSET instruction, the CPU begins by reading port 5. Since P5
P5
It reads P5
Since P5
The CPU therefore reads the value of port 5 as H'40, although the actual value in P5DR is H'80.
Next the CPU sets bit 0 of the read data to 1, changing the value to H'41.
Finally, the CPU writes this value (H'41) back to P5DR to complete the BSET instruction.
As a result, bit P5
both modified, changing the on/off settings of the MOS pull-up transistors of pins P5
Programming Solution: The switching of the pull-ups for P5
can be avoided by using a byte in RAM as a work area for P5DR, performing bit manipulations on
the work area, then writing the result to P5DR.
Input/output
Pin state
DDR
DR
Pull-up
Input/output
Pin state
DDR
DR
Pull-up
6
BSET.B
are input pins, the CPU reads the level of these pins directly, not the value in the data register.
5
to P5
7
as low (0) and P5
#0
0
P5
Input
Low
0
1
On
P5
Input
Low
0
0
Off
are output pins, for these pins the CPU reads the value in the data register (0).
0
is set to 1, switching pin P5
7
7
P5
Input
High
0
0
Off
@PORT5
P5
Input
High
0
1
On
6
6
6
as high (1).
P5
Output
Low
1
0
Off
P5
Output
Low
1
0
Off
5
5
P5
Output
Low
1
0
Off
;set bit 0 in data register
P5
Output
Low
1
0
Off
0
162
to high output. In addition, bits P5
4
4
P5
Low
1
0
P5
Low
1
0
Output
Off
Output
Off
3
3
7
and P5
P5
Output
Low
1
0
Off
P5
Output
Low
1
0
Off
2
2
6
in the preceding example
P5
Output
Low
1
0
Off
P5
Output
Low
1
0
Off
1
1
7
and P5
7
and P5
P5
Output
Low
1
0
Off
P5
Output
High
1
1
Off
6
0
0
7
are
6
and
.