HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 182

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HD6475328-CP10

Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
Bits 7 to 4 are reserved. They cannot be modified and are always read as “1.”
At a reset and in the hardware standby mode, P6DDR is initialized to H'F0, making all four pins
input pins. P6DDR is not initialized in the software standby mode, so in the single-chip mode, or
expanded minimum mode, if a P6DDR bit is set to “1” when the chip enters the software standby
mode, the corresponding pin continues to output the value in the port 6 data register.
2. Port 6 Data Register (P6DR)—H'FF8B
Bit
Initial value
Read/Write
P6DR is an 8-bit register containing the data for pins P6
Bits 7 to 4 are reserved. They cannot be modified and are always read as “1.”
At a reset and in the hardware standby mode, P6DR is initialized to H'F0.
When the CPU reads P6DR, for output pins it reads the value in the P6DR latch, but for input
pins, it obtains the pin status directly.
9.7.3 Pin Functions in Each Mode
The usage of port 6 depends on the MCU operating mode. Separate descriptions are given below.
Pin Functions in Mode 3: In mode 3 (the expanded maximum mode in which the on-chip ROM
is not used), P6DDR is automatically set for output, and the pins of port 6 carry the page address
bits (A
Expanded Maximum Mode Using On-Chip ROM (Mode 4): If a “1” is set in P6DDR, the
corresponding pin is used for address output. If a “0” is set in P6DDR, the pin is used for
input. P6DDR is initialized to H'F0 at a reset and in the hardware standby mode.
Expanded Maximum Mode Not Using On-Chip ROM (Mode 3): All bits of P6DDR are
fixed at “1” and cannot be modified.
19
– A
16
) of the address bus. Figure 9-16 shows the pin functions for mode 3.
7
1
6
1
5
1
165
4
1
3
to P6
R/W
P6
3
0
3
0
.
R/W
P6
2
0
2
R/W
P6
1
0
1
R/W
P6
0
0
0

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