HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 258

no-image

HD6475328-CP10

Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
13.3.4 Setting of Overflow Flag
The OVF bit is set to 1 when the timer count overflows. Simultaneously, the WDT module
requests an NMI or IRQ
13.4 Application Notes
1. Contention between TCNT Write and Increment: If a timer counter clock pulse is
generated during the T
the timer counter is not incremented. See figure 13-6.
ø
TCNT
Internal overflow
signal
OVF
0
3
interrupt. The timing is shown in figure 13-5.
state of a write cycle to the timer counter, the write takes priority and
Figure 13-5 Setting of OVF Bit
H'FF
H'00
243

Related parts for HD6475328-CP10