HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 267

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HD6475328-CP10

Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
Bit 4—Receive Enable (RE): This bit enables or disables the receive function. When the receive
function is enabled, the RXD pin is automatically used for input. When the receive function is
disabled, the RXD pin is available as a general-purpose I/O port.
Bit 4
RE
0
1
Bits 3 and 2—Reserved: These bits cannot be modified and are always read as 1.
Bit 1—Clock Enable 1 (CKE1): This bit selects the internal or external clock source for the
baud rate generator. When the external clock source is selected, the SCK pin is automatically
used for input of the external clock signal.
Bit 1
CKE1
0
1
Bit 0—Clock Enable 0 (CKE0): When an internal clock source is used in synchronous mode,
this bit enables or disables serial clock output at the SCK pin.
This bit is ignored when the external clock is selected, or when the asynchronous mode is
selected.
For further information on the communication format and clock source selection, see tables 14-5
and 14-6 in section 14.3, “Operation.”
Bit 0
CKE0
0
1
Description
The receive function is disabled. The RXD pin can be
used as a general-purpose I/O port.
The receive function is enabled. The RXD pin is used for input.
Description
Internal clock source.
External clock source. (The SCK pin is used for input.)
Description
The SCK pin is not used by the SCI (and is available as
a general-purpose I/O port).
The SCK pin is used for serial clock output.
252
(Initial value)
(Initial value)
(Initial value)

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