HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 3

• Manufacturer Part Number: HD6475328-CP10
• Description: original Hitachi CMOS microcomputer unit (MCU)
• Manufacturer: HITACHI [Hitachi Semiconductor]

Section 1 Overview
1.1
1.2
1.3
Section 2 MCU Operating Modes and Address Space
2.1
2.2
2.3
2.4
Section 3 CPU
3.1
3.2
3.3
3.4
3.5
Features ··································································································································1
Block Diagram ·······················································································································4
Pin Arrangements and Functions ···························································································5
1.3.1 Pin Arrangement ·········································································································5
1.3.2 Pin Functions ··············································································································8
Overview ······························································································································23
Mode Descriptions ···············································································································24
Address Space Map ··············································································································25
2.3.1 Page Segmentation ····································································································25
2.3.2 Page 0 Address Allocations ······················································································27
Mode Control Register (MDCR) ·························································································29
Overview ······························································································································31
3.1.1 Features ·····················································································································31
3.1.2 Address Space ···········································································································32
3.1.3 Register Configuration ······························································································33
CPU Register Descriptions ··································································································34
3.2.1 General Registers ······································································································34
3.2.2 Control Registers ······································································································35
3.2.3 Initial Register Values ·······························································································40
Data Formats ························································································································41
3.3.1 Data Formats in General Registers ···········································································41
3.3.2 Data Formats in Memory ··························································································42
Instructions ···························································································································44
3.4.1 Basic Instruction Formats ·························································································44
3.4.2 Addressing Modes ····································································································45
3.4.3 Effective Address Calculation ···················································································47
Instruction Set ······················································································································50
3.5.1 Overview ···················································································································50
3.5.2 Data Transfer Instructions ·························································································52
3.5.3 Arithmetic Instructions ·····························································································53
3.5.4 Logic Operations ·······································································································54
3.5.5 Shift Operations ········································································································55
3.5.6 Bit Manipulations ······································································································56
3.5.7 Branching Instructions ······························································································57
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