HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 318

• Manufacturer Part Number: HD6475328-CP10
• Description: original Hitachi CMOS microcomputer unit (MCU)
• Manufacturer: HITACHI [Hitachi Semiconductor]

18.1 Overview
The H8/532 has a power-down state that greatly reduces power consumption by stopping the CPU
functions. The power-down state includes three modes:
1. Sleep mode—
2. Software standby mode—
3. Hardware standby mode— a hardware-triggered mode in which the entire chip is inactive
The sleep mode and software standby mode are entered from the program execution state by
executing the SLEEP instruction under the conditions given in table 18-1. The hardware standby
mode is entered from any other state by a Low input at the STBY pin.
Table 18-1 lists the conditions for entering and leaving the power-down modes. It also indicates
the status of the CPU, on-chip supporting modules, etc., in each power-down mode.
Table 18-1 Power-Down State
Mode
Sleep
mode
Soft-
ware
standby
mode
Hard-
ware
standby
mode
* The watchdog timer must also be stopped.
Notes: SBYCR Software standby control register
SSBY
Entering
Procedure
Execute
SLEEP
instruction
Set SSBY bit
in SBYCR to
1, then
execute SLEEP
instruction*
Set STBY
pin to Low
level
Software standby bit
Section 18 Power-Down State
Clock
Run
Halt
Halt
a software-triggered mode in which the CPU halts but the rest of
the chip remains active
a software-triggered mode in which the entire chip is inactive
CPU
Halt
Halt
Halt
CPU
Reg’s.
Held
Held
Not
held
307
Sup.
and
initialized
partly
initialized
Mod’s.
Run
Halt
partly
Halt
and
RAM
Held
Held
Held
I/O
Ports
Held
Held
High
impe-
dance
state
Exiting
Methods
• Interrupt
• RES Low
• STBY Low
• NMI
• RES Low
• STBY Low
• STBY High,
then RES
Low
High