HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 322

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HD6475328-CP10

Manufacturer Part Number
HD6475328-CP10
Description
original Hitachi CMOS microcomputer unit (MCU)
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
18.3.5 Application Notes
(1) The I/O ports retain their current states in the software standby mode. If a port is in the High
(2) If the software standby mode is entered under either condition
Oscillator
ø
NMI
NMEG
SSBY
output state, its output current is not reduced in the software standby mode.
ZTAT version of the H8/532, current dissipation is greater than in normal standby mode (I
100 to 300µA). This problem does not occur in H8/532 versions with masked ROM.
This problem does not occur in the expanded mode when on-chip ROM is disabled (mode 1).
In applications in which the additional standby current must be avoided, take one of the
following actions:
In single-chip mode (mode 3): if software standby mode is entered after even one
In expanded mode with on-chip ROM enabled (mode 2): if software standby mode is
instruction not stored in on-chip ROM has been fetched (e.g. from on-chip RAM).
entered after even one instruction not stored in on-chip ROM has been fetched (e.g. from
external memory or on-chip RAM).
Figure 18-1 NMI Timing of Software Standby Mode (Application Example)
NMI interrupt handling
NMIEG = 1
SSBY = 1
SLEEP instruction
Software standby mode
(Power-down state)
311
Clock start-up
time
WDT interval (t
Clock setting time
or condition
OSC2
WDT overflow
)
NMI interrupt handling
below in a
CC
=

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