HD6475328-CP10 HITACHI [Hitachi Semiconductor], HD6475328-CP10 Datasheet - Page 61

• Manufacturer Part Number: HD6475328-CP10
• Description: original Hitachi CMOS microcomputer unit (MCU)
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bit data locations are specified by bit number. Bit 15 is the most significant bit. Bit 0 is the least
significant bit. BCD and byte data are stored in the lower 8 bits of a general register. Word data
use all 16 bits of a general register. Longword data use two general registers: the upper 16 bits
are stored in Rn (n must be an even number); the lower 16 bits are stored in Rn+1.
Operations performed on BCD data or byte data do not affect the upper 8 bits of the register.
Table 3-4 General Register Data Formats
1-Bit
* For longword data n must be even (0, 2, 4, or 6).
3.3.2 Data Formats in Memory
Table 3-5 indicates the data formats in memory.
Instructions that access bit data in memory have byte or word operands. The instruction specifies
a bit number to indicate a specific bit in the operand.
Access to word data in memory must always begin at an even address. Access to word data
starting at an odd address causes an address error. The upper 8 bits of word data are stored in
address n (where n is an even number); the lower 8 bits are stored in address n+1.
Data Type
BCD
Byte
Word
Longword
Register No.
Rn
Rn
Rn
Rn
Rn*
Rn+1*
15
15
15
15
31
15
Data Structure
MSB
MSB
15
14
13
Don’t-care
Don’t-care
12
42
11
10
9
Upper 16 bits
Lower 16 bits
8
8
8
7
7
7
MSB
Upper digit
6
5
4
4
3
3
Lower digit
2
1
LSB
LSB
LSB
0
0
0
0
0
16
0