AT88SA102S_11 ATMEL [ATMEL Corporation], AT88SA102S_11 Datasheet - Page 8

• Manufacturer Part Number: AT88SA102S_11
• Description: Atmel CryptoAuthentication Product Authentication Chip
• Manufacturer: ATMEL [ATMEL Corporation]

4.
AC Parameters
Table 4-1.
Parameter
Wake low duration
Wake delay to data
comm.
Start pulse duration
Zero transmission high
pulse
Zero transmission low
pulse
Bit time
Turn around delay
High side glitch filter @
active
Low side glitch filter @
active
Low side glitch filter @
sleep
IO Timeout
Watchdog reset
AC Parameters
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
WLO
WHI
START
ZHI
ZLO
BIT
TURNAROUND
HIGNORE_A
LIGNORE_A
LIGNORE_S
TIMEOUT
WATCHDOG
Direction
To Atmel
AT88SA102S
To Atmel
AT88SA102S
To Atmel
AT88SA102S
From Atmel
AT88SA102S
To Atmel
AT88SA102S
From Atmel
AT88SA102S
To Atmel
AT88SA102S
From Atmel
AT88SA102S
To Atmel
AT88SA102S
From Atmel
AT88SA102S
From Atmel
AT88SA102S
To Atmel
AT88SA102S
To Atmel
AT88SA102S
To Atmel
AT88SA102S
To Atmel
AT88SA102S
To Atmel
AT88SA102S
To Atmel
AT88SA102S
15 µs
Min
500
2.5
4.1
4.6
4.1
4.6
4.1
4.6
60
37
41
28
45
45
45
3
4.34
4.34
4.34
Typ
6.0
6.0
6.0
39
54
60
65
4
45 ms
Max
4.56
4.56
4.56
8.6
8.6
8.6
5.7
45
78
95
85
-
-
Atmel AT88SA102S [DATASHEET]
Unit
ms
ms
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
ns
s
Notes
Signal can be stable in either high or low
levels during extended sleep intervals.
Signal should be stable high for this entire
duration. t
chip will transition to sleep.
If the bit time exceeds t
AT88SA102S will enter sleep mode and the
Wake token must be resent.
The AT88SA102S will initiate the first low
going transition after this time interval
following the end of the Transmit flag
After the AT88SA102S transmits the last bit
of a block, system must wait this interval
before sending the first bit of a flag
Pulses shorter than this in width will be
ignored by the chip, regardless of its state
when active
Pulses shorter than this in width will be
ignored by the chip, regardless of its state
when active
Pulses shorter than this in width will be
ignored by the chip when in sleep mode
See Section 5.3.1
Max time from Wake until chip is forced into
sleep mode. See Section 5.4
WHI
must not exceed t
8584G−CRYPTO−9/11
TIMEOUT
then the
TIMEOUT
or the
8