CY62127DV30L CYPRESS [Cypress Semiconductor], CY62127DV30L Datasheet - Page 2
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CY62127DV30L
Manufacturer Part Number
CY62127DV30L
Description
1-Mb (64K x 16) Static RAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY62127DV30L.pdf
(11 pages)
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Document #: 38-05229 Rev. *H
Product Portfolio
Pin Configurations
Notes:
2. NC pins are not connected to the die.
3. Pin #23 of TSOP II and E3 ball of FBGA are DNU, which have to be left floating or tied to Vss to ensure proper application. (Expansion Pins on FBGA Package:
4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CY62127DV30LL
CY62127DV30LL
CY62127DV30LL
CY62127DV30L
CY62127DV30L
CY62127DV30L
E4 - 2M, D3 - 4M, H1 - 8M, G2 - 16M, H6 - 32M).
Product
BLE
I/O
V
V
I/O
I/O
I/O
NC
SS
CC
1
14
8
15
9
BHE
I/O
I/O
I/O
I/O
OE
NC
A
2
8
10
11
12
13
FBGA (Top View)
Min.
2.2
2.2
2.2
2.2
DNU
A
V
NC
A
A
A
A
A
3
14
12
[2, 3]
9
0
3
5
CC
Range (V)
Typ.
A
A
A
NC
3.0
3.0
3.0
3.0
A
A
A
A
4
15
13
10
1
4
7
6
CE
I/O
I/O
I/O
I/O
WE
A
A
5
11
Max.
2
3
4
1
5
3.6
3.6
3.6
3.6
NC
V
V
NC
I/O
I/O
I/O
I/O
CC
SS
6
0
2
6
7
Speed
(ns)
45
45
55
55
70
70
B
C
D
E
F
G
H
A
Typ
0.85
0.85
0.85
0.85
0.85
0.85
f = 1 MHz
[4]
Max.
1.5
1.5
1.5
1.5
1.5
1.5
Operating, I
Typ.
6.5
6.5
5
5
5
5
[4]
Power Dissipation
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
V
WE
A
A
A
A
CC
NC
CE
CC
A
A
A
A
A
SS
15
14
13
12
TSOP II (Forward)
4
3
2
1
0
0
1
2
3
4
5
6
7
Max.
(mA)
f = f
13
13
10
10
10
10
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
12
Top View
MAX
CC
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
= V
Range
Auto
Ind’l
Ind’l
Ind’l
Ind’l
Ind’l
Ind’l
A
A
A
OE
BHE
BLE
I/O
I/O
I/O
I/O
V
V
I/O
I/O
I/O
I/O
NC
A
A
A
A
DNU
CC(typ)
5
6
7
SS
CC
8
9
10
11
15
14
13
12
11
10
9
8
, T
CY62127DV30
A
= 25°C.
Standby I
Typ.
1.5
1.5
1.5
1.5
1.5
1.5
1.5
[4]
Page 2 of 11
SB2
Max.
15
5
4
5
4
5
4
(µA)
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