M58BW032BB45T3T STMICROELECTRONICS [STMicroelectronics], M58BW032BB45T3T Datasheet - Page 26

• Manufacturer Part Number: M58BW032BB45T3T
• Description: 32 Mbit (1Mb x32, Boot Block, Burst) 3.3V Supply Flash Memory
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M58BW032BT, M58BW032BB, M58BW032DT, M58BW032DB
specific block thus allowing program/erase opera-
tions to this block, regardless of the WP pin status.
Two bus operations are required to issue a Clear
Block Protection Configuration Register com-
mand:
Table 8. Commands
Note: 1. X Don’t Care; RA Read Address, RD Read Data, ID Device Code, IDA Identifier Address, IDD Identifier Data, SRD Status Register
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Read Memory Array
Read Electronic Signature
Read Status Register
Read Query
Clear Status Register
Block Erase
Erase All Main Blocks
Program
Write to Buffer and Program
Program/Erase Suspend
Program/Erase Resume
Set Burst Configuration
Register
Tuning Protection Program
Tuning Protection Unlock
Set Block Protection
Configuration Register
Clear Block Protection
Configuration Register
The first cycle writes the setup command
The second write cycle specifies the address
of the block to unprotect and confirms the
command. If the command is not confirmed,
2. The Manufacturer Code, the Device Code, the Burst Configuration Register, and the Block Protection Configuration Register of
3. Cycles 1 and 2 input the first 32 bits of the code, cycles 3 and 4 the second 32 bits of the code.
Data, PA Program Address; PD Program Data, QA Query Address, QD Query Data, BA Any address in the Block, BCR Burst Con-
figuration Register value, TPA = Tuning Protection Address, TPC = Tuning Protection Code, N+1 number of Words to program, BA
Block address.
each block are read using the Read Electronic Signature command.
Command
any block
OTP Block
(3)
(2)
(3)
N+4 Write
1
1
2
2
2
2
1
1
4
4
2
2
2 Write
2 Write
2 Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Op.
1st Cycle
Addr. Data Op.
AAh
AAh
AAh
AAh
55h
55h
X
X
X
X
X
X
X
X
X
X
X
FFh Read
E8h Write
B0h
D0h
90h Read IDA
70h
98h Read
50h
20h Write
80h Write
40h
10h
40h Write
60h Write BCRh
48h Write TPAh TPCh Write AAh 48h Write TPAh TPCh
78h Write TPAh TPCh Write
60h Write
60h Write
Write
To unprotect multiple blocks, the Clear Block Pro-
tection Configuration Register command must be
repeated for each block.
Any attempt to unprotect a block already unpro-
tected does not affect its status.
2nd Cycle
Addr. Data
AAh
the sequence is aborted and the device
outputs the Status Register with bits 4 and 5
set to ‘1’.
RA
RA
BA
BA
BA
BA
PA
PA
(1)
Bus Operations
IDD
D0h
D0h
D0h
03h
01h
RD
RD
PD
PD
N
(1)
Read RA
Write
Op. Addr. Data Op. Addr. Data
3rd Cycle
PA
X
78h Write TPAh TPCh
RD
PD Write
4th Cycle
X
D0h