M58BW032BB45T3T STMICROELECTRONICS [STMicroelectronics], M58BW032BB45T3T Datasheet - Page 28

• Manufacturer Part Number: M58BW032BB45T3T
• Description: 32 Mbit (1Mb x32, Boot Block, Burst) 3.3V Supply Flash Memory
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M58BW032BT, M58BW032BB, M58BW032DT, M58BW032DB
STATUS REGISTER
The Status Register provides information on the
current or previous Program, Erase, Block Protect
or Tuning Protection operation. The various bits in
the Status Register convey information and errors
on the operation. They are output on DQ7-DQ0.
To read the Status Register the Read Status Reg-
ister command can be issued. The Status Register
is automatically read after Program, Erase, Block
Protect, Program/Erase Resume commands. The
Status Register can be read from any address.
The contents of the Status Register can be updat-
ed during an erase or program operation by tog-
gling the Output Enable or Output Disable pins or
by dis-activating (Chip Enable, V
tivating (Chip Enable and Output Enable, V
Output Disable, V
The Status Register bits are summarized in
11., Status Register
junction with the following text descriptions.
Program/Erase Controller Status (Bit 7)
The Program/Erase Controller Status bit indicates
whether the Program/Erase Controller is active or
inactive. When the Program/Erase Controller Sta-
tus bit is set to ‘0’, the Program/Erase Controller is
active; when bit7 is set to ‘1’, the Program/Erase
Controller is inactive.
The Program/Erase Controller Status is set to ‘0’
immediately after a Program/Erase Suspend com-
mand is issued until the Program/Erase Controller
pauses. After the Program/Erase Controller paus-
es the bit is set to ‘1’.
During Program and Erase operations the Pro-
gram/Erase Controller Status bit can be polled to
find the end of the operation. The other bits in the
Status Register should not be tested until the Pro-
gram/Erase Controller completes the operation
and the bit is set to ‘1’.
After the Program/Erase Controller completes its
operation the Erase Status (bit5), Program/Tuning
Protection Unlock status (bit4) bits should be test-
ed for errors.
Erase Suspend Status (Bit 6)
The Erase Suspend Status bit indicates that an
Erase operation has been suspended and is wait-
ing to be resumed. The Erase Suspend Status
should only be considered valid when the Pro-
gram/Erase Controller Status bit is set to ‘1’ (Pro-
gram/Erase Controller inactive); after a Program/
Erase Suspend command is issued the memory
may still complete the operation rather than enter-
ing the Suspend mode.
When the Erase Suspend Status bit is set to ‘0’,
the Program/Erase Controller is active or has com-
pleted its operation; when the bit is set to ‘1’, a Pro-
gram/Erase Suspend command has been issued
28/60
IH
.) the device.
Bits. Refer to Table
IH
) and then reac-
11
in con-
IL
Table
, and
and the memory is waiting for a Program/Erase
Resume command.
When a Program/Erase Resume command is is-
sued the Erase Suspend Status bit returns to ‘0’.
Erase Status (Bit 5)
The Erase Status bit can be used to identify if the
memory has failed to verify that the block has
erased correctly. The Erase Status bit should be
read once the Program/Erase Controller Status bit
is High (Program/Erase Controller inactive).
When the Erase Status bit is set to ‘0’, the memory
has successfully verified that the block has erased
correctly. When the Erase Status bit is set to ‘1’,
the Program/Erase Controller has applied the
maximum number of pulses to the block and still
failed to verify that the block has erased correctly.
Once set to ‘1’, the Erase Status bit can only be re-
set to ‘0’ by a Clear Status Register command or a
hardware reset. If set to ‘1’ it should be reset be-
fore a new Program or Erase command is issued,
otherwise the new command will appear to fail.
Program/ Write to Buffer and Program/Tuning
Protection Unlock Status (Bit 4)
The Program/Write to Buffer and Program/Tuning
Protection Unlock Status bit is used to identify a
Program failure, a Write to Buffer and Program
failure or a Tuning Protection Code verify failure.
Bit4 should be read once the Program/Erase Con-
troller Status bit is High (Program/Erase Controller
inactive).
When bit4 is set to ‘0’ the memory has successful-
ly verified that the device has programmed cor-
rectly or that the correct Tuning Protection Code
has been written. When bit4 is set to ‘1’ the device
has failed to verify that the data has been pro-
grammed correctly or that the correct Tuning Pro-
tection code has been written.
Once set to 1’, the Program Status bit can only be
reset to ‘0’ by a Clear Status Register command or
a hardware reset. If set to ‘1’ it should be reset be-
fore a new Program or Erase command is issued,
otherwise the new command will appear to fail.
V
used to identify if a program or erase operation
has been attempted when V
When Bit 3 is set to ‘0’ no program or erase oper-
ations have been attempted with V
since the last Clear Status Register command, or
hardware reset.
When Bit 3 is set to ‘1’ a program or erase opera-
tion has been attempted with V
Once set to ‘1’, Bit 3 can only be reset by an Clear
Status Register command or a hardware reset. If
set to ‘1’ it should be reset before a new program
PEN
Status (Bit 3). The V
PEN
PEN
PEN
is Low, V
Status bit can be
Low, V
PEN
Low, V
IL
IL
.
.
IL
,