NCP1250ASN100T1G ONSEMI [ON Semiconductor], NCP1250ASN100T1G Datasheet
NCP1250ASN100T1G
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NCP1250ASN100T1G Summary of contents
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NCP1250 Current-Mode PWM Controller for Off-line Power Supplies The NCP1250 is a highly integrated PWM controller capable of delivering a rugged and high performance offline power supply in a tiny TSOP−6 package. With a supply range ...
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... NCP1250ASN65T1G NCP1250BSN65T1G NCP1250ASN100T1G NCP1250BSN100T1G ORDERING INFORMATION Device Package Marking NCP1250ASN65T1G 25A NCP1250BSN65T1G 252 NCP1250ASN100T1G 25C NCP1250BSN100T1G 25D †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/ ramp comp ...
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OPP Vlatch OVP gone? vdd Frequency modulation Frequency foldback Vfold Vskip vdd RFB / 4.2 FB LEB CS Figure 2. Internal Circuit Architecture Vcc and logic management hiccup 600−ns time constant vdd power on reset IpFlag Up counter RST 4 ...
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MAXIMUM RATINGS TABLE Symbol V Power Supply voltage Maximum DRV pin voltage when DRV in H state, transient voltage (Note 1) DRVtran Maximum voltage on low power pins CS, FB and OPP IOPP Maximum injected negative ...
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ELECTRICAL CHARACTERISTICS (For typical values T = 25C, for min/max values T J Symbol SUPPLY SECTION − (For the best efficiency performance, we recommend a V VCC V increasing level at which driving pulses are authorized ON CC VCC V ...
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ELECTRICAL CHARACTERISTICS (For typical values T = 25C, for min/max values T J Symbol INTERNAL OSCILLATOR f Frequency jittering in percentage of f jitter f Swing frequency swing FEEDBACK SECTION R Internal pull−up resistor up R Equivalent ac resistor from ...
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TEMPERATURE (C) Figure −50 − TEMPERATURE (C) Figure 5. ...
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TEMPERATURE (C) Figure 9. 19.9 19.4 18.9 18.4 17.9 17.4 16.9 16.4 15.9 −50 − TEMPERATURE (C) Figure 11 ...
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kHz SW 1.5 1 0.5 0 −50 − TEMPERATURE (C) Figure 15 −50 − TEMPERATURE (C) Figure 17. 390 340 290 240 ...
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TEMPERATURE (C) Figure 21. 100 −50 − TEMPERATURE (C) Figure 23 ...
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TEMPERATURE (C) Figure 27. 12.9 12.4 11.9 11.4 10.9 10.4 9.9 9.4 8.9 −50 − TEMPERATURE (C) Figure 29. 1.9 1.8 1.7 1.6 1.5 1.4 1.3 ...
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TEMPERATURE (C) Figure 33. 390 340 290 240 190 −50 − TEMPERATURE (C) Figure 35. 160 150 140 130 120 110 100 90 ...
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Introduction The NCP1250 implements a standard current mode architecture where the switch−off event is dictated by the peak current setpoint. This component represents the ideal candidate where low part−count and cost effectiveness are the key parameters, particularly in low−cost ac−dc ...
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D2 1N4007 12 input mains D4 1N4007 Figure 39. The Startup Resistor Can Be Connected to the Input Mains for Further Power Dissipation Reduction The first step starts with the calculation of the V capacitor which will supply the controller ...
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SCR won’t remain latched. To build a sufficient design margin, we recommend to keep at least 60 mA flowing at the ...
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RoppU This p oin t will be adjusted to reduce the ref at hi line to the desired level. OPP oppL Figure 41. The OPP Circuitry Affects the Maximum Peak Current Set Point by Summing a ...
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Finally, please note that another comparator internally fixes the maximum peak current set point to 0.8 V even if the OPP pin is inadvertently biased above 0 V. Frequency Foldback The reduction of no−load standby power associated with the need ...
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Figure 44. An Auto−Recovery Hiccup Mode is Activated for Faults Longer than 100 ms Slope Compensation The NCP1250 includes an ...
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In our flyback design, let’s assume that our primary is 770 mH, and the SMPS delivers 19 V with inductance ratio of 1:0.25. The off−time primary current slope thus given by: ...
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V. Under 3 mA and neglecting the series diode forward drop, it requires a series resistor of latch VOP OVP OVP OPPL In nominal ...
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NT C ROPPU 841k OP P ROPPL 2.5k Vlatch Figure 48. The Internal Circuitry Hooked to Pin 3 Can Be Used to Implement Over Temperature Protection (OTP) Back to our 19 V adapter, we have found that the plateau voltage ...
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D3 15V ROPPU 841k OPP 10 4 ROPPL 2.5k 5 Vlatch Figure 49. With the NTC Back in Place, the Circuit Nicely Combines OVP, OTP and OPP on the Same Pin In nominal V / output conditions, ...
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É É É É É É NOTE 0.05 A1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting ...