ADP1053 AD [Analog Devices], ADP1053 Datasheet - Page 65

• Manufacturer Part Number: ADP1053
• Description: 3-Channel Digital
• Manufacturer: AD [Analog Devices]

Data Sheet
Table 89. Register 0xFE43/0xFE47/0xFE4B/0xFE4F/0xFE53/0xFE57/0xFE5B/0xFE5F—OUT1 to OUT8 Settings
Bits
7
[6:5]
4
3
2
1
0
Table 90. Register 0xFE60—PWM Output Pin Disable
Bits
7
6
5
4
3
2
1
0
GO COMMAND REGISTER
Table 91. Register 0xFE61—GO Commands
Bits
[7:4]
3
2
1
0
Bit Name
OUT
Channel assignment
Current/volt-second
balance enable
t
t
t
t
Bit Name
OUT8 disable
OUT7 disable
OUT6 disable
OUT5 disable
OUT4 disable
OUT3 disable
OUT2 disable
OUT1 disable
Bit Name
Reserved
Frequency GO
PWM setting GO
VS_B reference GO
VS_A reference GO
RX
RX
FX
FX
modulation enable
modulation sign
modulation enable
modulation sign
X
180° delay
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Setting this bit adds a 180° delay to the timing of the OUT
These bits assign the PWM output to a channel (OUT
OUT7, or OUT8).
Bit 6
0
0
1
1
If current balance control or volt-second balance control is enabled, this bit enables the feature
on the specific PWM output (OUT
0 = OUT
1 = OUT
0 = no PWM modulation of the t
1 = PWM modulation acts on the t
0 = positive sign. Increase of PWM modulation moves t
1 = negative sign. Increase of PWM modulation moves t
0 = no PWM modulation of the t
1 = PWM modulation acts on the t
0 = positive sign. Increase of PWM modulation moves t
1 = negative sign. Increase of PWM modulation moves t
Description
Description
Reserved.
This bit synchronously latches the contents of Register 0xFE0A to Register 0xFE0C into the
shadow registers used to calculate the switching frequency.
This bit synchronously latches the contents of Register 0xFE40 to Register 0xFE5F into the
shadow registers used to calculate the PWM edge timing.
This bit synchronously latches the contents of Register 0xFE23 and Register 0xFE25 into the
shadow registers used to calculate the VS_B voltage reference.
This bit synchronously latches the contents of Register 0xFE22 and Register 0xFE24 into the
shadow registers used to calculate the VS_A voltage reference.
Setting this bit disables the OUT8 output.
Setting this bit disables the OUT7 output.
Setting this bit disables the OUT6 output.
Setting this bit disables the OUT5 output.
Setting this bit disables the OUT4 output.
Setting this bit disables the OUT3 output.
Setting this bit disables the OUT2 output.
Setting this bit disables the OUT1 output.
X
X
modulated by volt-second balance control.
modulated by dual-phase current balance control.
Bit 5
0
1
0
1
Rev. A | Page 65 of 84
PWM Output Assignment
OUT
OUT
OUT
OUT
X
X
X
X
assigned to Channel A.
assigned to Channel B.
assigned to Channel C with soft start enabled.
assigned to Channel C with soft start disabled.
RX
FX
X
RX
edge.
FX
edge.
= OUT1, OUT2, OUT3, OUT4, OUT5, OUT6, OUT7, or OUT8).
edge.
edge.
X
= OUT1, OUT2, OUT3, OUT4, OUT5, OUT6,
RX
FX
RX
FX
right.
right.
X
left.
left.
edges.
ADP1053