LNBH221_06 STMICROELECTRONICS [STMicroelectronics], LNBH221_06 Datasheet - Page 11
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LNBH221_06
Manufacturer Part Number
LNBH221_06
Description
Dual LNB supply and control IC with Step-Up converter and I2C interface
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.LNBH221_06.pdf
(27 pages)
LD39150
5.4
5.5
5.6
Figure 5.
Byte format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an
acknowledge bit. The MSB is transferred first.
Acknowledge
The master (µP) puts a resistive HIGH level on the SDA line during the acknowledge clock
pulse (see
(LOW) the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW
during this clock pulse. The peripheral which has been addressed has to generate an
acknowledge after the reception of each byte, otherwise the SDA line remains at the HIGH
level during the ninth clock pulse time. In this case the master transmitter can generate the
STOP information in order to abort the transfer. The LNBH221 won't generate the
acknowledge if the V
Transmission without acknowledgement
Avoiding to detect the acknowledge of the LNBH221, the µP can use a simpler
transmission: simply it waits one clock without checking the slave acknowledging, and
sends the new data.
This approach of course is less protected from misworking and decreases the noise
immunity..
Data Validity On The I
Figure
7.). The peripheral (LNBH221) that acknowledges has to pull-down
CC
2
supply is below the Undervoltage Lockout threshold (6.7V typ.).
C Bus
Application information
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