T89C51RD2-3CSCL ATMEL [ATMEL Corporation], T89C51RD2-3CSCL Datasheet - Page 38
T89C51RD2-3CSCL
Manufacturer Part Number
T89C51RD2-3CSCL
Description
0 to 40 MHz Flash Programmable 8-bit Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.T89C51RD2-3CSCL.pdf
(104 pages)
- Current page: 38 of 104
- Download datasheet (2Mb)
Interrupt System
Figure 16. Interrupt Control System
38
EXF2
INT0
INT1
PCA IT
TF0
TF1
TF2
T89C51RD2
RI
TI
Individual Enable
IE0
IE1
The T89C51RD2 has a total of 7 interrupt vectors: two external interrupts (INT0 and
INT1), three timer interrupts (timers 0, 1 and 2), the serial port interrupt and the PCA glo-
bal interrupt. These interrupts are shown in Figure 16.
Each of the interrupt sources can be individually enabled or disabled by setting or clear-
ing a bit in the Interrupt Enable register (See Table 23.). This register also contains a
global disable bit, which must be cleared to disable all interrupts at once.
Each interrupt source can also be individually programmed to one out of four priority lev-
els by setting or clearing a bit in the Interrupt Priority register (See Table 24.) and in the
Interrupt Priority High register (See Table 22). shows the bit values and priority levels
associated with each combination.
Table 22. Priority Level Bit Values
IPH.x
0
0
1
1
IPH, IP
IP.x
0
1
0
1
3
0
3
0
3
0
3
0
3
0
3
0
3
0
Global Disable
Interrupt Level Priority
3 (Highest)
0 (Lowest)
High priority
interrupt
1
2
Interrupt
polling
sequence, decreasing from
high to low priority
Low priority
interrupt
4243G–8051–05/03
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