ATMEGA48V_11 ATMEL [ATMEL Corporation], ATMEGA48V_11 Datasheet - Page 309
ATMEGA48V_11
Manufacturer Part Number
ATMEGA48V_11
Description
8-bit Atmel Microcontroller with 4/8/16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA48V_11.pdf
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29.7
2545T–AVR–05/11
3. C
4. f
5. This requirement applies to all Atmel ATmega48/88/168 2-wire Serial Interface operation. Other devices connected to the 2-
SPI timing characteristics
wire Serial Bus need only obey the general f
CK
b
= capacitance of one bus line in pF.
= CPU clock frequency.
Figure 29-4. 2-wire serial bus timing.
See
Table 29-6.
Note:
SCL
SDA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Figure 29-5 on page 310
t
SU;STA
Description
SCK period
SCK high/low
Rise/fall time
Setup
Hold
Out to SCK
SCK to out
SCK to out high
SS low to out
SCK period
SCK high/low
Rise/fall time
Setup
Hold
SCK to out
SCK to SS high
SS high to tri-state
SS low to SCK
1. In SPI programming mode the minimum SCK high/low period is:
- 2 t
- 3 t
SPI timing parameters.
CLCL
CLCL
for f
for f
(1)
CK
CK
t
SCL
HD;STA
< 12MHz
> 12MHz
t
of
t
requirement.
LOW
and
Mode
Master
Master
Master
Master
Master
Master
Master
Master
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Figure 29-6 on page 310
t
HIGH
t
HD;DAT
Minimum
4 • t
2 • t
10
t
20
20
ck
ck
ck
t
LOW
t
SU;DAT
Typical
See
on page 169
50% duty cycle
3.6
10
10
0.5 • t
10
10
15
15
10
for details.
ATmega48/88/168
Table 19-5
sck
Maximum
1600
t
SU;STO
t
r
t
BUF
309
ns
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