ATMEGA48V_11 ATMEL [ATMEL Corporation], ATMEGA48V_11 Datasheet - Page 90

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ATMEGA48V_11

Manufacturer Part Number
ATMEGA48V_11
Description
8-bit Atmel Microcontroller with 4/8/16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
15.2.1
15.2.2
2545T–AVR–05/11
Definitions
Registers
Figure 15-1. 8-bit timer/counter block diagram.
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A or Compare Unit B. However, when using the register or
bit defines in a program, the precise form must be used, that is, TCNT0 for accessing
Timer/Counter0 counter value and so on.
The definitions in
Table 15-1.
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit
registers. Interrupt request (abbreviated to Int.req. in the figure) signals are all visible in the
Timer Interrupt Flag Register (TIFR0). All interrupts are individually masked with the Timer Inter-
rupt Mask Register (TIMSK0). TIFR0 and TIMSK0 are not shown in the figure.
BOTTOM
MAX
TOP
Definitions.
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest value in the
count sequence. The TOP value can be assigned to be the fixed value 0xFF
(MAX) or the value stored in the OCR0A Register. The assignment is depen-
dent on the mode of operation.
Table 15-1
Timer/counter
TCCRnA
OCRnA
TCNTn
OCRnB
=
=
are also used extensively throughout the document.
Direction
Count
Clear
Control logic
TOP
=
TCCRnB
BOTTOM
Fixed
value
TOP
clk
=
Tn
0
ATmega48/88/168
OCnA
(Int.req.)
OCnB
(Int.req.)
TOVn
(Int.req.)
Clock select
generation
generation
(From prescaler)
Waveform
Waveform
detector
Edge
OCnA
OCnB
Tn
90

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