ATXMEGA128B3-AU ATMEL [ATMEL Corporation], ATXMEGA128B3-AU Datasheet - Page 14

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ATXMEGA128B3-AU

Manufacturer Part Number
ATXMEGA128B3-AU
Description
8/16-bit Atmel XMEGA B3 Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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7.3.4
7.3.5
7.4
7.5
8074B–AVR–02/12
Fuses and Lock bits
Data Memory
Production Signature Row
User Signature Row
The production signature row is a separate memory section for factory programmed data. It con-
tains calibration data for functions such as oscillators and analog modules. Some of the
calibration values will be automatically loaded to the corresponding module or peripheral unit
during reset. Other values must be loaded from the signature row and written to the correspond-
ing peripheral registers from software. For details on calibration conditions, refer to
Characteristics” on page
The production signature row also contains an ID that identifies each microcontroller device type
and a serial number for each manufactured device. The serial number consists of the production
lot number, wafer number, and wafer coordinates for the device. The device ID for the available
devices is shown in
The production signature row cannot be written or erased, but it can be read from application
software and external programmers.
Table 7-1.
The user signature row is a separate memory section that is fully accessible (read and write)
from application software and external programmers. It is one flash page in size, and is meant
for static user parameter storage, such as calibration data, custom serial number, identification
numbers, random number seeds, etc. This section is not erased by chip erase commands that
erase the flash, and requires a dedicated erase command. This ensures parameter storage dur-
ing multiple program/erase operations and on-chip debug sessions.
The fuses are used to configure important system functions, and can only be written from an
external programmer. The application software can read the fuses. The fuses are used to config-
ure reset sources such as brownout detector and watchdog, startup configuration, JTAG enable,
and JTAG user ID.
The lock bits are used to set protection levels for the different flash sections (i.e., if read and/or
write access should be blocked). Lock bits can be written by external programmers and applica-
tion software, but only to stricter protection levels. Chip erase is the only way to erase the lock
bits. To ensure that flash contents are protected even during chip erase, the lock bits are erased
after the rest of the flash memory has been erased.
An unprogrammed fuse or lock bit will have the value one, while a programmed fuse or lock bit
will have the value zero.
Both fuses and lock bits are reprogrammable like the flash program memory.
The data memory contains the I/O memory, internal SRAM and optionally memory mapped
EEPROM. The data memory is organized as one continuous memory section, see
page
start addresses for all XMEGA devices.
ATxmega128B3
ATxmega64B3
15. To simplify development, I/O Memory, EEPROM and SRAM will always have the same
Device
Device ID bytes for XMEGA B3 devices.
Table 7-1 on page
68.
Byte 2
4B
51
14.
Device ID bytes
Byte 1
96
97
XMEGA B3
Byte 0
Figure 7-2 on
1E
1E
”Electrical
14

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