ATxmega128D4-AU ATMEL [ATMEL Corporation], ATxmega128D4-AU Datasheet - Page 125

• Manufacturer Part Number: ATxmega128D4-AU
• Description: 8/16-bit Atmel XMEGA D4 Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

8135L–AVR–06/12
22. TWI Transmit collision flag not cleared on repeated start
23. Clearing TWI Stop Interrupt Flag may lock the bus
24. TWI START condition at bus timeout will cause transaction to be dropped
25. TWI Data Interrupt Flag erroneously read as set
Problem fix/Workaround
None.
The TWI transmit collision flag should be automatically cleared on start and repeated start,
but is only cleared on start.
Problem fix/Workaround
Clear the flag in software after address interrupt.
If software clears the STOP Interrupt Flag (APIF) on the same Peripheral Clock cycle as the
hardware sets this flag due to a new address received, CLKHOLD is not cleared and the
SCL line is not released. This will lock the bus.
Problem fix/Workaround
Check if the bus state is IDLE. If this is the case, it is safe to clear APIF. If the bus state is
not IDLE, wait for the SCL pin to be low before clearing APIF.
Code:
/* Only clear the interrupt flag if within a "safe zone". */
while ( /* Bus not IDLE: */
{
}
/* Check for an pending address match interrupt */
if ( !(COMMS_TWI.SLAVE.STATUS & TWI_SLAVE_CLKHOLD_bm) )
{
}
If Bus Timeout is enabled and a timeout occurs on the same Peripheral Clock cycle as a
START is detected, the transaction will be dropped.
Problem fix/Workaround
None.
When issuing the TWI slave response command CMD=0b11, it takes one Peripheral Clock
cycle to clear the data interrupt flag (DIF). A read of DIF directly after issuing the command
will show the DIF still set.
/* Ensure that the SCL line is low */
if ( !(COMMS_PORT.IN & PIN1_bm) )
/* Safely clear interrupt flag */
COMMS_TWI.SLAVE.STATUS |= (uint8_t)TWI_SLAVE_APIF_bm;
)
((COMMS_TWI.MASTER.STATUS & TWI_MASTER_BUSSTATE_gm) !=
if ( !(COMMS_PORT.IN & PIN1_bm) )
TWI_MASTER_BUSSTATE_IDLE_gc)) &&
/* SCL not held by slave: */
!(COMMS_TWI.SLAVE.STATUS & TWI_SLAVE_CLKHOLD_bm)
break;
XMEGA D4
125