ATxmega128D4-AU ATMEL [ATMEL Corporation], ATxmega128D4-AU Datasheet - Page 126

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ATxmega128D4-AU

Manufacturer Part Number
ATxmega128D4-AU
Description
8/16-bit Atmel XMEGA D4 Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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8135L–AVR–06/12
26. WDR instruction inside closed window will not issue reset
28. Inverted I/O enable does not affect Analog Comparator Output
29. Non available functions and options
•TWIE, the TWI module on PORTE
•TWI SDAHOLD option in the TWI CTRL register is one bit
•CRC generator module
•ADC 1/2x gain option, and this configuration option in the GAIN bits in the ADC Channel
•ADC V
•ADC option to use internal Gnd as negative input in differential measurements and this
•ADC channel scan and the ADC SCAN register
•ADC current limitation option, and the CURRLIMIT bits in the ADC CTRLB register
•ADC impedance mode selection for the gain stage, and the IMPMODE bit in the ADC
•Timer/Counter 2 and the SPLITMODE configuration option in the BYTEM bits in the
•Analog Comparator (AC) current output option, and the AC CURRCTRL and CURRCALIB
•PORT remap functions with alternate pin locations for Timer/Counter output compare
•PORT RTC clock output option and the RTCOUT bit in the PORT CLKEVOUT register
•PORT remap functions with alternate pin locations for the clock and event output, and the
•TOSC alternate pin locations, and TOSCSEL bit in FUSEBYTE2
•Real Time Counter clock source options of external clock from TOSC1, and 32.768kHz from
Problem fix/Workaround
Add one NOP instruction before checking DIF.
When a WDR instruction is execute within one ULP clock cycle after updating the window
control register, the counter can be cleared without giving a system reset.
Problem fix/Workaround
Wait at least one ULP clock cycle before executing a WDR instruction.
The inverted I/O pin function does not affect the Analog Comparator output function
Problem fix/Workaround
Configure the analog comparator setup to give an inverted result, or use an external inverter
to change polarity of Analog Comparator Output.
The below function and options are not available. Writing to any registers or fuse to try and
enable or configure these functions or options will have no effect, and will be as writing to a
reserved address location.
CTRL register
REFCTRL register
configuration option in the MUXNEG bits in the ADC Channel MUXCTRL register
CTRLB register
Timer/Counter 0 CTRLE register
registers
channels, USART0 and SPI, and the PORT REMAP register
CLKEVPIN bit in the PORT CLKEVOUT register
TOSC, and 32.768kHz from the 32.768kHz internal oscillator, and these configuration
options in the RTCSRC bits in the Clock RTCTRL register
CC
/2 reference option and this configuration option in the REFSEL bits on the ADC
XMEGA D4
126

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