AT32UC3L064_11 ATMEL [ATMEL Corporation], AT32UC3L064_11 Datasheet - Page 107

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AT32UC3L064_11

Manufacturer Part Number
AT32UC3L064_11
Description
32-bit Atmel AVR Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
11.5
11.6
11.7
32099HS–12/2011
Rev. D - 06/2010
Rev. C - 06/2010
Rev. B - 05/2010
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Ordering Information: Ordering code for TQFP ES changed from AT32UC3L064-AUES to
AT32UC3L064-AUTES. TLLGA48 Tray option added.
Features and Description: Added QTouch library support.
USART: Description of unimplemented features removed.
Electrical Characteristics: Power Consumption numbers updated. Flash timing numbers
added.
Package and Pinout: Added pinout figure for TLLGA48 package.
Package and Pinout, GPIO function multiplexing:TWIMS0-TWCK on PA20 removed. ADCIFB-
AD[3] on PA17 removed, number of ADC channels are 8, not 9.
I/O Lines Considerations: Added: Following pins have high-drive capability: PA02, PA06,
PA08, PA09, and PB01.
Some TWI0 pins are SMBUS compliant (PA21, PB04, PB05).
HMATRIX Masters: PDCA is master 4, not master 3. SAU is master 3, not master 4.
SAU: IDLE bit added in the Status Register.
PDCA: Number of PDCA performance monitors is device dependent.
Peripheral Event System: Chapter updated.
PM: Bits in RCAUSE registers removed and renamed (JTAGHARD and AWIREHARD renamed
to JTAG and AWIRE respectively, JTAG and AWIRE removed. BOD33 bit removed).
PM: RCAUSE.BOD33 bit removed. SM33 reset will be detected as a POR reset.
PM: WDT can be used as wake-up source if WDT is clocked from 32KHz oscillator.
PM: Entering Shutdown mode description updated.
SCIF: DFLL output frequency is 40-150MHz, not 20-150MHz or 30-150MHz.
SCIF: Temperature sensor is connected to ADC channel 9, not 7.
SCIF: Updated the oscillator connection figure for OSC0
GPIO: Removed unimplemented features (pull-down, buskeeper, drive strength, slew rate,
Schmidt trigger, open drain).
SPI: RDR.PCS field removed (RDR[19:16]).
TWIS: Figures updated.
ADCIFB: The sample and hold time and the startup time formulas have been corrected (ADC
Configuration Register).
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