AT32UC3L064_11 ATMEL [ATMEL Corporation], AT32UC3L064_11 Datasheet - Page 89

• Manufacturer Part Number: AT32UC3L064_11
• Description: 32-bit Atmel AVR Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

10.2.12
10.2.13
10.2.14
32099HS–12/2011
CAT
aWire
CHIP
1. CAT asynchronous wake will be delayed by one AST event period
2. CAT QMatrix sense capacitors discharged prematurely
1. aWire CPU clock speed robustness
2. The aWire debug interface is reset after leaving Shutdown mode
1. In 3.3V Single Supply Mode, the Analog Comparator inputs affects the device’s ability
2. Increased Power Consumption in VDDIO in sleep modes
If the CAT detects a condition the should asynchronously wake the device in static mode,
the asynchronous wake will not occur until the next AST event. For example, if the AST is
generating events to the CAT every 50ms, and the CAT detects a touch at t=9200ms, the
asynchronous wake will occur at t=9250ms.
Fix/Workaround
None.
At the end of a QMatrix burst charging sequence that uses different burst count values for
different Y lines, the Y lines may be incorrectly grounded for up to n-1 periods of the periph-
eral bus clock, where n is the ratio of the PB clock frequency to the GCLK_CAT frequency.
This results in premature loss of charge from the sense capacitors and thus increased vari-
ability of the acquired count values.
Fix/Workaround
Enable the 1kOhm drive resistors on all implemented QMatrix Y lines (CSA 1, 3, 5, 7, 9, 11,
13, and/or 15) by writing ones to the corresponding odd bits of the CSARES register.
The aWire memory speed request command counter warps at clock speeds below approxi-
mately 5kHz.
Fix/Workaround
None.
If the aWire debug mode is used as debug interface and the program enters Shutdown
mode, the aWire interface will be reset when the part receives a wakeup either from the
WAKE_N pin or the AST.
Fix/Workaround
None.
to start
When using the 3.3V Single Supply Mode the state of the Analog Comparator input pins can
affect the device’s ability to release POR reset. This is due to an interaction between the
Analog Comparator input pins and the POR circuitry. The issue is not present in the 1.8V
Supply Mode or the 3.3V Supply Mode with 1.8V Regulated I/O Lines.
Fix/Workaround
ACREFN (pin PA16) must be connected to GND until the POR reset is released and the
Analog Comparator inputs should not be driven higher than 1.0 V until the POR reset is
released.
If OSC0 is enabled in crystal mode when entering a sleep mode where the OSC0 is dis-
abled, this will lead to an increased power consumption in VDDIO.
Fix/Workaround
AT32UC3L016/32/64
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