AT32UC3L064_11 ATMEL [ATMEL Corporation], AT32UC3L064_11 Datasheet - Page 90

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AT32UC3L064_11

Manufacturer Part Number
AT32UC3L064_11
Description
32-bit Atmel AVR Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
10.2.15
10.3
10.4
10.4.1
10.4.2
32099HS–12/2011
Rev. C
Rev. B
I/O Pins
Processor and Architecture
PDCA
1. PA17 has low ESD tolerance
Not sampled.
1. RETS behaves incorrectly when MPU is enabled
2. Hardware breakpoints may corrupt MAC results
3. Privilege violation when using interrupts in application mode with protected system
1. PCONTROL.CHxRES is non-functional
Solution 1: Disable OSC0 by writing a zero to the Oscillator Enable bit in the System Control
Interface (SCIF) Oscillator Control Register (SCIF.OSC0CTRL.OSCEN) before going to a
sleep mode where OSC0 is disabled.
Solution 2: Pull down or up XIN0 or XOUT0 with 1MOhm resistor.
PA17 only tolerates 500V ESD pulses (Human Body Model).
Fix/Workaround
Care must be taken during manufacturing and PCB design.
RETS behaves incorrectly when MPU is enabled and MPU is configured so that system
stack is not readable in unprivileged mode.
Fix/Workaround
Make system stack readable in unprivileged mode, or return from supervisor mode using
rete instead of rets. This requires:
1. Changing the mode bits from 001 to 110 before issuing the instruction. Updating the
mode bits to the desired value must be done using a single mtsr instruction so it is done
atomically. Even if this step is generally described as not safe in the UC technical reference
manual, it is safe in this very specific case.
2. Execute the RETE instruction.
Hardware breakpoints on MAC instructions may corrupt the destination register of the MAC
instruction.
Fix/Workaround
Place breakpoints on earlier or later instructions.
stack
If the system stack is protected by the MPU and an interrupt occurs in application mode, an
MPU DTLB exception will occur.
Fix/Workaround
Make a DTLB Protection (Write) exception handler which permits the interrupt request to be
handled in privileged mode.
PCONTROL.CHxRES is non-functional. Counters are reset at power-on, and cannot be
reset by software.
Fix/Workaround
Software needs to keep history of performance counters.
AT32UC3L016/32/64
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