LPC2104FBD48/00 NXP [NXP Semiconductors], LPC2104FBD48/00 Datasheet

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LPC2104FBD48/00

Manufacturer Part Number
LPC2104FBD48/00
Description
Single-chip 32-bit microcontrollers; 128 kB ISP/IAP flash with 16/32/64 kB RAM
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.LPC2104FBD4800.pdf (41 pages)
1. General description
2. Features
2.1 New features implemented in LPC2104/2105/2106/01 devices
2.2 Key common features
The UART are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and
embedded trace support, together with 128 kB of embedded high speed flash memory. A
128-bit wide memory interface and a unique accelerator architecture enable 32-bit code
execution at maximum clock rate. For critical code size applications, the alternative 16-bit
Thumb mode reduces code by more than 30 % with minimal performance penalty.
Due to their tiny size and low power consumption, these microcontrollers are ideal for
applications where miniaturization is a key requirement, such as access control and
point-of-sale. With a wide range of serial communications interfaces and on-chip SRAM
options up to 64 kB, they are very well suited for communication gateways and protocol
converters, soft modems, voice recognition and low end imaging, providing both large
buffer size and high processing power. Various 32-bit timers, PWM channels, and 32
GPIO lines make these microcontrollers particularly suitable for industrial control and
medical systems.
Remark: Throughout the data sheet, the term LPC2104/2105/2106 will apply to devices
with and without /00 and /01 suffixes. Suffixes will be used to differentiate devices
whenever they include new features.
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LPC2104/2105/2106
Single-chip 32-bit microcontrollers; 128 kB ISP/IAP flash with
16/32/64 kB RAM
Rev. 07 — 20 June 2008
Fast GPIO port enables port pin toggling up to 3.5 times faster than the original device
and also allows for a port pin to be read at any time regardless of its function.
UART 0/1 include fractional baud rate generator, autobauding capabilities, and
handshake flow-control fully implemented in hardware.
Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats.
SPI programmable data length and master mode enhancement.
Diversified Code Read Protection (CRP) enables different security levels to be
implemented.
General purpose timers can operate as external event counters.
16/32-bit ARM7TDMI-S processor.
16/32/64 kB on-chip static RAM.
128 kB on-chip flash program memory. 128-bit-wide interface/accelerator enables high
speed 60 MHz operation.
Product data sheet

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LPC2104FBD48/00 Summary of contents

Page 1

LPC2104/2105/2106 Single-chip 32-bit microcontrollers; 128 kB ISP/IAP flash with 16/32/64 kB RAM Rev. 07 — 20 June 2008 1. General description The UART are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 128 ...

Page 2

... Individual enable/disable of peripheral functions for power optimization. I Dual power supply: N CPU operating voltage range of 1. 1. I/O power supply range of 3 3 Ordering information Table 1. Type number LPC2104BBD48 LPC2104FBD48/00 LPC2104FBD48/01 LPC2105BBD48 LPC2105FBD48/00 LPC2105FBD48/01 LPC2106BBD48 LPC2106FBD48 LPC2104_2105_2106_7 Product data sheet Ordering information Package ...

Page 3

... NXP Semiconductors Table 1. Type number LPC2106FBD48/00 LPC2106FBD48/01 LPC2106FHN48 LPC2106FHN48/00 LPC2106FHN48/01 3.1 Ordering options Table 2. Type number LPC2104BBD48 LPC2104FBD48/00 LPC2104FBD48/01 LPC2105BBD48 LPC2105FBD48/00 LPC2105FBD48/01 LPC2106BBD48 LPC2106FBD48 LPC2106FBD48/00 LPC2106FBD48/01 LPC2106FHN48 LPC2106FHN48/00 LPC2106FHN48/01 LPC2104_2105_2106_7 Product data sheet Ordering information …continued Package Name Description LQFP48 plastic low profile quad flat package; 48 leads; ...

Page 4

NXP Semiconductors 4. Block diagram LPC2104/2105/2106 HIGH-SPEED P0 (3) GPIO 32 PINS TOTAL ARM7 LOCAL BUS INTERNAL SRAM CONTROLLER 16/32/64 kB SRAM EXTERNAL (1) EINT[2:0] INTERRUPTS (1) CAP0[2:0] CAPTURE/ (1) CAP1[3:0] COMPARE (1) MAT0[2:0] TIMER 0/TIMER 1 (1) MAT1[3:0] GENERAL ...

Page 5

NXP Semiconductors 5. Pinning information 5.1 Pinning P0.19/MAT1.2/TCK P0.20/MAT1.3/TDI P0.21/PWM5/TDO V P0.27/TRACEPKT0/TRST P0.28/TRACEPKT1/TMS P0.29/TRACEPKT2/TCK Pin configuration is identical for all LQFP48 packages. Fig 2. Pin configuration (LQFP48) LPC2104_2105_2106_7 Product data sheet n. DD(1V8) RESET 6 ...

Page 6

NXP Semiconductors terminal 1 index area P0.19/MAT1.2/TCK P0.20/MAT1.3/TDI P0.21/PWM5/TDO P0.27/TRACEPKT0/TRST P0.28/TRACEPKT1/TMS P0.29/TRACEPKT2/TCK Pin configuration is identical for LPC2106FHN48, LPC2106FHN48/00, and LPC2106FHN48/01. Fig 3. Pin configuration (HVQFN48) LPC2104_2105_2106_7 Product data sheet n. DD(1V8) RESET 6 ...

Page 7

NXP Semiconductors 5.2 Pin description Table 3. Pin description Symbol Pin P0.0 to P0.31 [1] P0.0/TXD0/PWM1 13 [1] P0.1/RXD0/PWM3 14 [2] P0.2/SCL/CAP0.0 18 [2] P0.3/SDA/MAT0.0 21 [1] P0.4/SCK/CAP0.1 22 [1] P0.5/MISO/MAT0.1 23 [1] P0.6/MOSI/CAP0.2 24 [1] P0.7/SSEL/PWM2 28 [1] P0.8/TXD1/PWM4 ...

Page 8

NXP Semiconductors Table 3. Pin description …continued Symbol Pin [1] P0.11/CTS1/CAP1.1 36 [1] P0.12/DSR1/MAT1.0 37 [1] P0.13/DTR1/MAT1.1 41 [1] P0.14/DCD1/EINT1 44 [1] P0.15/RI1/EINT2 45 [1] P0.16/EINT0/MAT0.2 46 [1] P0.17/CAP1.2/TRST 47 [1] P0.18/CAP1.3/TMS 48 [1] P0.19/MAT1.2/TCK 1 [1] P0.20/MAT1.3/TDI 2 [1] ...

Page 9

NXP Semiconductors Table 3. Pin description …continued Symbol Pin [4] P0.26/TRACESYNC 39 [4] P0.27/TRACEPKT0/ 8 TRST [4] P0.28/TRACEPKT1/ 9 TMS [4] P0.29/TRACEPKT2/ 10 TCK [4] P0.30/TRACEPKT3/ 15 TDI [4] P0.31/EXTIN0/TDO 16 [4] RTCK 26 DBGSEL 27 [5] RESET 6 XTAL1 ...

Page 10

NXP Semiconductors 6. Functional description 6.1 Architectural overview The ARM7TDMI general purpose 32-bit microprocessor, which offers high performance and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction ...

Page 11

NXP Semiconductors 6.4 Memory map The LPC2104/2105/2106 memory maps incorporate several distinct regions, as shown in the following figures. In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either flash memory (the default) or ...

Page 12

NXP Semiconductors 6.5 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the Interrupt Request (IRQ) inputs and categorizes, them as FIQ, vectored IRQ, and non-vectored IRQ as defined by programmable settings. The programmable assignment scheme means that priorities ...

Page 13

NXP Semiconductors Table 4. Block UART 1 PWM0 2 I C-bus SPI and SSP - PLL RTC System Control System Control System Control [1] Available on LPC2104/2105/2106/01 only. 6.6 Pin connect block The pin connect block allows selected pins of ...

Page 14

NXP Semiconductors Table 6. PINSEL0 1:0 3:2 5:4 7:6 9:8 11:10 13:12 15:14 17:16 19:18 21:20 23:22 25:24 LPC2104_2105_2106_7 Product data sheet Pin function select register 0 (PINSEL0 - 0xE002 C000) Pin name Value P0 ...

Page 15

NXP Semiconductors Table 6. PINSEL0 27:26 29:28 31:30 6.8 Pin function select register 1 (PINSEL1 - 0xE002 C004) The PINSEL1 register controls the functions of the pins as per the settings listed in Table 7. The direction control bit in ...

Page 16

NXP Semiconductors Table 7. PINSEL1 25:24 27:26 29:28 31:30 6.9 General purpose parallel I/O Device pins that are not connected to a specific peripheral function are controlled by the GPIO registers. Pins may be dynamically configured as inputs or outputs. ...

Page 17

NXP Semiconductors • Standard modem interface signals included on UART 1. 6.10.2 UART features available in LPC2104/2105/2106/01 only Compared to previous LPC2000 microcontrollers, UARTs in LPC2104/2105/2106/01 introduce a fractional baud rate generator for both UARTs, enabling these microcontrollers to achieve ...

Page 18

NXP Semiconductors 6.12 SPI serial I/O controller The SPI is a full duplex serial interface, designed to be able to handle multiple masters and slaves connected to a given bus. Only a single master and a single slave can communicate ...

Page 19

NXP Semiconductors 6.14.1 Features • A 32-bit Timer/Counter with a programmable 32-bit Prescaler. • four (Timer 1) and three (Timer 0) 32-bit capture channels, that can take a snapshot of the timer value when an input signal transitions. ...

Page 20

NXP Semiconductors • Programmable 32-bit timer with internal pre-scaler. • Selectable time period from (T T cy(PCLK) 6.16 Real time clock The Real Time Clock (RTC) is designed to provide a set of counters to measure time when normal or ...

Page 21

NXP Semiconductors With double edge controlled PWM outputs, specific match registers control the rising and falling edge of the output. This allows both positive going PWM pulses (when the rising edge occurs prior to the falling edge), and negative going ...

Page 22

NXP Semiconductors produce the output clock. Since the minimum output divider value insured that the PLL output has duty cycle.The PLL is turned off and bypassed ...

Page 23

NXP Semiconductors 3. Running an application with level CRP3 selected fully disables any access to chip via the JTAG pins and the ISP. This mode effectively disables ISP override using P0[14] pin, too the user’s application ...

Page 24

NXP Semiconductors processor clock rate. The second purpose of the APB divider is to allow power savings when an application does not require any peripherals to run at the full processor rate. Because the APB divider is connected to the ...

Page 25

NXP Semiconductors 6.19.3 RealMonitor RealMonitor is a configurable software module, developed by ARM Inc., which enables real time debug lightweight debug monitor that runs in the background while users debug their foreground application. It communicates with the ...

Page 26

NXP Semiconductors 7. Limiting values Table 8. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (1.8 V) DD(1V8) V supply voltage (3.3 V) DD(3V3) V input voltage I I supply current ...

Page 27

NXP Semiconductors 8. Static characteristics Table 9. Static characteristics +70 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage (1.8 V) DD(1V8) V supply voltage (3.3 V) DD(3V3) Standard port pins, ...

Page 28

NXP Semiconductors Table 9. Static characteristics +70 C for commercial applications, unless otherwise specified. amb Symbol Parameter LPC2104/2105/2106 and LPC2104/2105/2106/00 power consumption I active mode supply current V DD(act) I Power-down mode supply DD(pd) current ...

Page 29

NXP Semiconductors Table 9. Static characteristics +70 C for commercial applications, unless otherwise specified. amb Symbol Parameter Oscillator pins V input voltage on pin XTAL1 i(XTAL1) V output voltage on pin o(XTAL2) XTAL2 [1] Typical ...

Page 30

NXP Semiconductors I DD(act) (mA) Fig 6. I DD(idle) (mA) Fig 7. LPC2104_2105_2106_7 Product data sheet 1.65 1.70 1.75 Test conditions: Active mode entered executing code from on-chip flash; PCLK = all ...

Page 31

NXP Semiconductors I DD(idle) (mA) Fig 8. I DD(act) (mA) Fig 9. LPC2104_2105_2106_7 Product data sheet 15.0 10.0 5.0 0.0 1.65 1.70 1.75 Test conditions: Idle mode entered executing code from on-chip flash; PCLK = all ...

Page 32

NXP Semiconductors I DD(Idle) (mA) Fig 10. Typical LPC2104/2105/2106/ DD(pd Fig 11. Typical LPC2104/2105/2106/01 core power-down current I Table 10. Core voltage 1 Peripheral Timer 0 Timer 1 UART 0 UART 1 LPC2104_2105_2106_7 Product ...

Page 33

NXP Semiconductors Table 10. Peripheral PWM0 2 I C-bus SPI RTC SSP LPC2104_2105_2106_7 Product data sheet Typical LPC2104/2105/2106/01 peripheral power consumption in Idle mode …continued Rev. 07 — 20 June 2008 LPC2104/2105/2106 Single-chip 32-bit microcontrollers CCLK = 60 MHz 0.511 ...

Page 34

NXP Semiconductors 9. Dynamic characteristics Table 11. Dynamic characteristics +70 C for commercial applications +85 C for industrial applications; V amb [1] specified ranges. Symbol Parameter External clock f oscillator frequency osc ...

Page 35

NXP Semiconductors 9.1 Timing Fig 12. External clock timing (with an amplitude of at least V LPC2104_2105_2106_7 Product data sheet LPC2104/2105/2106 t CHCX CHCL CLCX CLCH T cy(clk) = 200 mV) i(RMS) Rev. 07 — 20 June ...

Page 36

NXP Semiconductors 10. Package outline LQFP48: plastic low profile quad flat package; 48 leads; body 1 pin 1 index DIMENSIONS (mm are the original ...

Page 37

NXP Semiconductors HVQFN48: plastic thermal enhanced very thin quad flat package; no leads; 48 terminals; body 0.85 mm terminal 1 index area terminal 1 48 index area DIMENSIONS (mm ...

Page 38

NXP Semiconductors 11. Abbreviations Table 12. Acronym AMBA APB CPU DCC FIFO GPIO PLL PWM RAM SPI SSI SSP SRAM TTL UART LPC2104_2105_2106_7 Product data sheet Abbreviations Description Advanced Microcontroller Bus Architecture ARM Peripheral Bus Central Processing Unit Debug Communications ...

Page 39

... The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Section 3 “Ordering information”; corrected temperature range for LPC2104FBD48/00, LPC2105FBD48/00. Parts LPC2104FBD48/01, LPC2105FBD48/01, LPC2106BBD48, LPC2106FBD48/01, and LPC2106FHN48/01 added. ...

Page 40

NXP Semiconductors 13. Legal information 13.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

Page 41

NXP Semiconductors 15. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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