LPC2420FBD208 NXP [NXP Semiconductors], LPC2420FBD208 Datasheet - Page 22

• Manufacturer Part Number: LPC2420FBD208
• Description: Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 4.
LPC2420_60_3
Preliminary data sheet
Symbol
P4[25]/WE
P4[26]/BLS0
P4[27]/BLS1
P4[28]/BLS2/
MAT2[0]/TXD3
P4[29]/BLS3/
MAT2[1]/RXD3
P4[30]/CS0
P4[31]/CS1
ALARM
USB_D 2
DBGEN
TDO
TDI
TMS
TRST
TCK
RTCK
RSTOUT
RESET
XTAL1
XTAL2
RTCX1
RTCX2
Pin description
Pin
179
119
139
170
176
187
193
37
52
9
2
4
6
8
10
206
29
35
44
46
34
36
[1]
[1]
[1]
[1]
[1]
[8]
[1]
[7]
[8]
[8]
[8]
[8]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
…continued
Ball
B9
L15
G15
C11
B10
B7
A4
N1
U1
F4
D3
C2
E3
D1
E2
C3
K3
M2
M4
N4
K2
L2
[8]
[1]
[1]
[1]
[1]
[1]
[1]
[8]
[8]
[1]
[1]
[1]
[1]
[8]
[7]
[8]
[1]
[1]
[1]
[1]
Type
I/O
O
I/O
O
I/O
O
I/O
O
O
O
I/O
O
O
I
I/O
O
I/O
O
O
I/O
I
O
I
I
I
I
I/O
O
I
I
O
I
O
Rev. 03 — 20 November 2008
Description
P4[25] — General purpose digital input/output pin.
WE — LOW active Write Enable signal.
P4[26] — General purpose digital input/output pin.
BLS0 — LOW active Byte Lane select signal 0.
P4[27] — General purpose digital input/output pin.
BLS1 — LOW active Byte Lane select signal 1.
P4 [28] — General purpose digital input/output pin.
BLS2 — LOW active Byte Lane select signal 2.
MAT2[0] — Match output for Timer 2, channel 0.
TXD3 — Transmitter output for UART3.
P4[29] — General purpose digital input/output pin.
BLS3 — LOW active Byte Lane select signal 3.
MAT2[1] — Match output for Timer 2, channel 1.
RXD3 — Receiver input for UART3.
P4[30] — General purpose digital input/output pin.
CS0 — LOW active Chip Select 0 signal.
P4[31] — General purpose digital input/output pin.
CS1 — LOW active Chip Select 1 signal.
ALARM — RTC controlled output. This is a 1.8 V pin. It goes HIGH when
a RTC alarm is generated.
USB_D 2 — USB port 2 bidirectional D line.
DBGEN — JTAG interface control signal. Also used for boundary
scanning.
TDO — Test data out for JTAG interface.
TDI — Test data in for JTAG interface.
TMS — Test Mode Select for JTAG interface.
TRST — Test Reset for JTAG interface.
TCK — Test Clock for JTAG interface. This clock must be slower than
of the CPU clock (CCLK) for the JTAG interface to operate.
RTCK — JTAG interface control signal.
Note: LOW on this pin while RESET is LOW enables ETM pins (P2[9:0])
to operate as Trace port after reset.
RSTOUT — This is a 3.3 V pin. LOW on this pin indicates LPC2420/2460
being in Reset state.
external reset input: A LOW on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0. TTL with hysteresis, 5 V tolerant.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
Flashless 16-bit/32-bit microcontroller
LPC2420/2460
© NXP B.V. 2008. All rights reserved.
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