ATA5771_09 ATMEL [ATMEL Corporation], ATA5771_09 Datasheet - Page 143
ATA5771_09
Manufacturer Part Number
ATA5771_09
Description
Microcontroller with UHF ASK/FSK Transmitter
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATA5771_09.pdf
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• Bit 0– TOV0: Timer/Counter0 Overflow Flag
The bit TOV0 is set when an overflow occurs in Timer/Counter0. TOV0 is cleared by hardware
when executing the corresponding interrupt handling vector. Alternatively, TOV0 is cleared by
writing a logic one to the flag. When the SREG I-bit, TOIE0 (Timer/Counter0 Overflow Interrupt
Enable), and TOV0 are set, the Timer/Counter0 Overflow interrupt is executed.
The setting of this flag is dependent of the WGM02:0 bit setting. See
Table 13-8 on page 86
and
”Waveform Generation Mode Bit Description” on page
86.
ATtiny24/44/84
90
7701C–AVR–12/08
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