AK4343EN AKM [Asahi Kasei Microsystems], AK4343EN Datasheet - Page 29
AK4343EN
Manufacturer Part Number
AK4343EN
Description
Stereo DAC with HP/RCV/SPK-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
1.AK4343EN.pdf
(98 pages)
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ASAHI KASEI
b) PLL reference clock: BICK or LRCK pin
Sampling frequency corresponds to 7.35kHz to 48kHz by changing FS3-0 bits (see Table 7).
The external clocks (MCKI, BICK and LRCK) should always be present whenever the DAC is in operation (PMDAC bit
= “1”). If these clocks are not provided, the AK4343 may draw excess current and it is not possible to operate properly
because utilizes dynamic refreshed logic internally. If the external clocks are not present, the DAC should be in the
power-down mode (PMDAC bit = “0”).
MS0478-E-01
Figure 21. PLL Slave Mode 2 (PLL Reference Clock: LRCK pin)
Figure 20. PLL Slave Mode 2 (PLL Reference Clock: BICK pin)
AK4343
AK4343
MCKO
MCKI
BICK
LRCK
SDTI
MCKO
MCKI
BICK
LRCK
SDTI
32fs or 64fs
- 29 -
≥ 32fs
1fs
1fs
BCLK
LRCK
SDTO
BCLK
LRCK
SDTO
DSP or µP
DSP or µP
[AK4343]
2006/10
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