AK4343EN AKM [Asahi Kasei Microsystems], AK4343EN Datasheet - Page 94
AK4343EN
Manufacturer Part Number
AK4343EN
Description
Stereo DAC with HP/RCV/SPK-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
1.AK4343EN.pdf
(98 pages)
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AK4343EN
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ASAHI KASEI
Master clock can be stopped when DAC is not used.
1. PLL Master Mode
2. PLL Slave Mode (LRCK or BICK pin)
3. PLL Slave (MCKI pin)
MS0478-E-01
External LRCK
External MCKI
External MCKI
External BICK
Stop of Clock
(Addr:01H, D0)
(Addr:01H, D1)
(Addr:01H, D0)
(Addr:01H, D0)
(Addr:01H, D1)
<Example>
<Example>
<Example>
PMPLL bit
PMPLL bit
PMPLL bit
MCKO bit
MCKO bit
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop MCKO clock: MCKO bit = “1” → “0”
(3) Stop an external master clock.
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop the external BICK and LRCK clocks
(1) Power down PLL: PMPLL bit = “1” → “0”
(2) Stop the external master clock.
Stop MCKO output: MCKO bit = “1” → “0”
"1" or "0"
Input
Input
Input
Input
(1)
(1)
(1)
(2)
(1)
(3)
(2)
(2)
(2)
Figure 84. Clock Stopping Sequence (1)
Figure 85. Clock Stopping Sequence (2)
Figure 86. Clock Stopping Sequence (3)
- 94 -
Example:
Example
Example
Input Master Clock Select at PLL Mode: 11.2896MHz
BICK frequency at Master Mode: 64fs
Audio I/F Format : MSB justified
Audio I/F Format: MSB justified
Audio I/F Format: MSB justified
PLL Reference clock: MCKI
PLL Reference clock: BICK
BICK frequency: 64fs
BICK frequency: 64fs
(1) (2) Addr:01H, Data:08H
(3) Stop an external MCKI
(2) Stop the external clocks
(2) Stop the external clocks
(1) Addr:01H, Data:00H
(1) Addr:01H, Data:00H
[AK4343]
2006/10
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